From Stdlib Require Import Strings.String.
From Stdlib Require Import String Ascii.
From Stdlib Require Arith.
From stdpp Require Import base.
From stdpp Require Import fin_maps.
From stdpp Require Import gmap.
From stdpp Require Import base gmultiset.
From Stdlib Require Classical.
From Stdlib Require Import ZArith.
From stdpp.bitvector Require Import definitions tactics.
From Stdlib Require Import Sorting.Sorted.
From Stdlib Require Import Reals.Rbasic_fun.
From Stdlib Require Import Reals.Abstract.ConstructiveAbs.
From Stdlib Require Import Reals.Rdefinitions.
From stdpp Require Import list_relations.
From stdpp Require Import list_numbers.
From stdpp Require Import functions.
From Stdlib Require Import ClassicalEpsilon.
From stdpp Require Import base decidable.
From Stdlib Require Import ZArith.Zeuclid.
From Stdlib Require Import ZArith.Znumtheory.
From stdpp Require Import propset.
From Stdlib Require Import Reals.
Require Import Why3.Base.
Require Import Why3.Qed.Qed.
Require Import Why3.Memory.Memory.
Require Import should_we_balance.A_thread_variables_properties.A_thread_variables_properties.
Require Import should_we_balance.Compound.Compound.
Require Import Why3.Cint.Cint.
Require Import should_we_balance.A_schedule_cpumask.A_schedule_cpumask.
Require Import Why3.Cbits.Cbits.
Open Scope Z_scope.
Theorem goal22 (i_8 : Z) (a_1 : addr) (t_7 : addr -> Z) (t_10 : addr -> addr) (a : addr) (i : Z) (t_3 : addr -> Z) (t_4 : addr -> Z) (i_1 : Z) (i_9 : Z) (i_3 : Z) (i_4 : Z) (t_9 : addr -> Z) (i_5 : Z) (t : Z -> Z) (i_6 : Z) (i_7 : Z) (i_2 : Z) (p_2 : bool) (t_1 : Z -> Z) (t_5 : addr -> Z) (p : bool) (p_1 : bool) (t_2 : Z -> Z) (t_8 : addr -> Z) (t_6 : addr -> Z) : let x : Z := l_idle_cpu i_8 in let a_2 : addr := shift a_1 3%Z in let x_1 : Z := t_7 a_2 in let a_3 : addr := shift a_1 4%Z in let a_4 : addr := t_10 a_3 in let a_5 : addr := shift a_4 0%Z in let a_6 : addr := t_10 a_5 in let a_7 : addr := shift a_1 1%Z in let x_2 : Z := t_7 a_7 in let x_3 : Z := t_7 (shift a_6 x_2) in let a_8 : addr := shift a_1 0%Z in let a_9 : addr := t_10 a_8 in let a_10 : addr := shift a_9 0%Z in let a_11 : addr := t_10 a_10 in let a_12 : addr := l_group_balance_mask a_11 in let a_13 : addr := t_10 (shift a_12 0%Z) in let a_14 : addr := shift a i in let a_15 : addr := shift a_9 1%Z in let a_16 : addr := shift a_14 0%Z in let a_17 : addr := t_10 a_16 in let a_18 : addr := shift a_17 0%Z in let a_19 : addr := shift a_6 0%Z in let a_20 : addr -> Z := havoc t_3 t_7 a_18 l_size in let a_21 : addr -> Z := havoc t_4 t_7 a_18 l_size in let a_22 : Z := a_21 (shift a_17 i_8) in let a_23 : Z := a_21 (shift a_6 i_1) in let a_24 : Z := a_21 (shift a_6 i_8) in let a_25 : Z := a_21 (shift a_13 i_1) in let a_26 : Z := a_21 a_15 in let a_27 : addr := shift a_13 0%Z in let a_28 : addr := l_cpu_smt_mask i_8 in let a_29 : addr := t_10 (shift a_28 0%Z) in let a_30 : addr := shift a_29 0%Z in let x_4 : Z := to_uint32 i_9 in ¬ i_3 = - 1%Z -> (¬ x = 0%Z) = (¬ i_4 = 0%Z) -> ¬ x_1 = 2%Z -> ¬ x_3 = 0%Z -> ¬ t_9 (shift a_6 i_5) = 0%Z -> ¬ t_9 (shift a_13 i_5) = 0%Z -> 0%Z ≤ i -> i < l_size -> 0%Z ≤ i_5 -> i_3 ≤ i_5 -> i_5 < l_size -> 0%Z ≤ i_8 -> i_5 ≤ i_8 -> i_8 < l_size -> 0%Z ≤ i_9 -> i_9 ≤ l_size -> to_uint32 i_8 < l_size -> 0%Z ≤ x_2 -> x_2 < l_size -> region (base a) ≤ 0%Z -> region (base a_1) ≤ 0%Z -> framed t_10 -> linked t -> is_uint8 i_4 -> is_uint8 i_6 -> is_uint8 i_7 -> is_uint32 i -> is_sint32 i_1 -> is_sint32 i_2 -> is_sint32 i_3 -> is_sint32 i_8 -> is_sint32 i_9 -> valid_rd t a_1 5%Z -> is_uint32 x_1 -> is_sint32 (1%Z + i_8) -> is_sint32 x_2 -> valid_rd t a_3 1%Z -> valid_rd t a_7 1%Z -> valid_rd t a_2 1%Z -> valid_rd t a_8 1%Z -> valid_rd t a_14 1%Z -> valid_rd t a_4 1%Z -> valid_rd t (t_10 (shift a_1 2%Z)) 2%Z -> valid_rd t a_9 2%Z -> is_sint32 (t_7 a_15) -> is_sint32 (t_9 a_15) -> valid_rd t a_16 1%Z -> valid_rd t a_5 1%Z -> valid_rd t a_10 1%Z -> valid_rd t a_11 1%Z -> valid_rd t a_12 1%Z -> is_uint8 x_3 -> is_uint8 (t_9 (shift a_6 i_3)) -> valid_rd t a_18 l_size -> valid_rd t a_19 l_size -> valid_rw t a_18 l_size -> is_uint8 (t_9 (shift a_13 i_3)) -> is_uint8 (a_20 (shift a_6 (- 1%Z))) -> is_uint8 (a_20 (shift a_13 (- 1%Z))) -> is_uint8 a_22 -> is_uint8 a_23 -> is_uint8 a_24 -> is_uint8 a_25 -> is_sint32 (a_20 a_15) -> is_sint32 a_26 -> valid_rd t a_27 l_size -> separated a_18 l_size a_27 l_size -> (if decide (i_4 = 0%Z) then p_2 = false ∧ i_3 = i_1 ∧ t_1 = t ∧ havoc t_5 t_7 a_18 l_size = t_9 ∧ i_8 ≤ 2147483646%Z ∧ valid_rd t_1 a_28 1%Z ∧ valid_rd t_1 a_14 1%Z ∧ valid_rd t_1 a_30 l_size ∧ valid_rd t_1 a_18 l_size ∧ (a_14 = Mk_addr 0%Z 0%Z -> i_6 = 0%Z) ∧ (¬ a_14 = Mk_addr 0%Z 0%Z -> ¬ i_6 = 0%Z) ∧ (¬ a_14 = a_28 -> separated a_18 l_size a_30 l_size) ∧ (¬ a_14 = Mk_addr 0%Z 0%Z -> (∀(i_10 : Z), let a_31 : addr := shift a_17 i_10 in ¬ t_9 a_31 = 0%Z -> 0%Z ≤ i_10 -> i_10 < l_size -> ¬ a_21 a_31 = 0%Z)) ∧ (¬ a_14 = Mk_addr 0%Z 0%Z -> (∀(i_10 : Z), let a_31 : addr := shift a_17 i_10 in 0%Z ≤ i_10 -> i_10 < l_size -> (a_21 (shift a_29 i_10) = 0%Z ∧ ¬ a_21 a_31 = 0%Z) = (¬ t_9 a_31 = 0%Z))) ∧ (a_14 = Mk_addr 0%Z 0%Z ∨ valid_rw t_1 a_18 l_size) ∧ (∀(i_10 : Z), 0%Z ≤ i_10 -> i_10 < l_size -> separated a_18 l_size (shift (t_10 (shift (l_cpu_smt_mask i_10) 0%Z)) 0%Z) l_size) ∧ (∀(i_10 : Z), 0%Z ≤ i_10 -> i_10 < l_size -> p_idle_core t_10 a_21 i_10 -> p_idle_core t_10 t_9 i_10) ∧ (∀(i_10 : Z), 0%Z ≤ i_10 -> i_10 < l_size -> p_idle_core t_10 t_9 i_10 -> p_idle_core t_10 a_21 i_10) else p = false ∧ p_1 = false ∧ i_2 = i_1 ∧ t_2 = t ∧ ¬ x = 0%Z ∧ land 7%Z (t_8 a_15) = 0%Z ∧ a_21 = t_8 ∧ havoc t_6 t_7 a_18 l_size = t_9 ∧ i_8 ≤ 2147483646%Z ∧ ¬ p_idle_core t_10 t_8 i_8 ∧ valid_rd t_2 a_8 1%Z ∧ valid_rd t_2 a_28 1%Z ∧ valid_rd t_2 a_14 1%Z ∧ valid_rd t_2 a_15 1%Z ∧ valid_rd t_2 a_30 l_size ∧ valid_rd t_2 a_18 l_size ∧ (if decide (i_2 = - 1%Z) then i_8 = i_3 else i_3 = i_2) ∧ (a_14 = Mk_addr 0%Z 0%Z -> i_7 = 0%Z) ∧ (¬ a_14 = Mk_addr 0%Z 0%Z -> ¬ i_7 = 0%Z) ∧ (¬ a_14 = a_28 -> separated a_18 l_size a_30 l_size) ∧ (¬ a_14 = Mk_addr 0%Z 0%Z -> (∀(i_10 : Z), let a_31 : addr := shift a_17 i_10 in ¬ t_9 a_31 = 0%Z -> 0%Z ≤ i_10 -> i_10 < l_size -> ¬ t_8 a_31 = 0%Z)) ∧ (¬ a_14 = Mk_addr 0%Z 0%Z -> (∀(i_10 : Z), let a_31 : addr := shift a_17 i_10 in 0%Z ≤ i_10 -> i_10 < l_size -> (t_8 (shift a_29 i_10) = 0%Z ∧ ¬ t_8 a_31 = 0%Z) = (¬ t_9 a_31 = 0%Z))) ∧ (a_14 = Mk_addr 0%Z 0%Z ∨ valid_rw t_2 a_18 l_size) ∧ (∀(i_10 : Z), 0%Z ≤ i_10 -> i_10 < l_size -> p_idle_core t_10 t_9 i_10 -> p_idle_core t_10 t_8 i_10) ∧ (∀(i_10 : Z), 0%Z ≤ i_10 -> i_10 < l_size -> p_idle_core t_10 t_8 i_10 -> p_idle_core t_10 t_9 i_10) ∧ (∀(i_10 : Z), 0%Z ≤ i_10 -> i_10 < l_size -> separated a_18 l_size (shift (t_10 (shift (l_cpu_smt_mask i_10) 0%Z)) 0%Z) l_size) ∧ (∀(i_10 : Z), let a_31 : addr := shift a i_10 in 0%Z ≤ i_10 -> i_10 < l_size -> valid_rd t_2 a_31 1%Z ∧ valid_rw t_2 (shift (t_10 (shift a_31 0%Z)) 0%Z) l_size) ∧ (∀(a_31 : addr), let a_32 : addr := l_sched_group_cpus a_31 in let a_33 : addr := shift (t_10 (shift a_32 0%Z)) 0%Z in valid_rd t_2 a_32 1%Z ∧ valid_rd t_2 a_33 l_size ∧ (∀(i_10 : Z), 0%Z ≤ i_10 -> i_10 < l_size -> separated a_33 l_size (shift (t_10 (shift (shift a i_10) 0%Z)) 0%Z) l_size)) ∧ (∀(a_31 : addr), let a_32 : addr := l_sched_group_mask a_31 in let a_33 : addr := shift (t_10 (shift a_32 0%Z)) 0%Z in valid_rd t_2 a_32 1%Z ∧ valid_rd t_2 a_33 l_size ∧ (∀(i_10 : Z), 0%Z ≤ i_10 -> i_10 < l_size -> separated a_33 l_size (shift (t_10 (shift (shift a i_10) 0%Z)) 0%Z) l_size)) ∧ (∀(a_31 : addr), let a_32 : addr := l_group_balance_mask a_31 in let a_33 : addr := shift (t_10 (shift a_32 0%Z)) 0%Z in valid_rd t_2 a_32 1%Z ∧ valid_rd t_2 a_33 l_size ∧ (∀(i_10 : Z), 0%Z ≤ i_10 -> i_10 < l_size -> separated a_33 l_size (shift (t_10 (shift (shift a i_10) 0%Z)) 0%Z) l_size)) ∧ (∀(i_10 : Z), let a_31 : addr := l_cpu_smt_mask i_10 in let a_32 : addr := shift (t_10 (shift a_31 0%Z)) 0%Z in 0%Z ≤ i_10 -> i_10 < l_size -> valid_rd t_2 a_31 1%Z ∧ valid_rd t_2 a_32 l_size ∧ (∀(i_11 : Z), 0%Z ≤ i_11 -> i_11 < l_size -> separated a_32 l_size (shift (t_10 (shift (shift a i_11) 0%Z)) 0%Z) l_size))) -> (¬ land 7%Z a_26 = 0%Z -> i_1 = - 1%Z) -> (¬ i_1 = - 1%Z -> ¬ l_idle_cpu i_1 = 0%Z ∧ ¬ a_23 = 0%Z ∧ ¬ a_25 = 0%Z ∧ 0%Z ≤ i_1 ∧ i_1 < l_size) -> (i_1 = - 1%Z -> (∀(i_10 : Z), ¬ a_21 (shift a_13 i_10) = 0%Z -> 0%Z ≤ i_10 -> i_10 < l_size -> ¬ a_21 (shift a_17 i_10) = 0%Z)) -> ((∃(i_10 : Z), ¬ a_21 (shift a_17 i_10) = 0%Z ∧ ¬ a_21 (shift a_6 i_10) = 0%Z ∧ i_10 < l_size ∧ x_4 ≤ i_10) -> x_4 ≤ i_8) -> ((∃(i_10 : Z), ¬ a_21 (shift a_17 i_10) = 0%Z ∧ ¬ a_21 (shift a_6 i_10) = 0%Z ∧ i_10 < l_size ∧ x_4 ≤ i_10) -> ¬ a_22 = 0%Z ∧ ¬ a_24 = 0%Z) -> ((∀(i_10 : Z), i_10 < l_size -> x_4 ≤ i_10 -> a_21 (shift a_17 i_10) = 0%Z ∨ a_21 (shift a_6 i_10) = 0%Z) -> l_size = i_8) -> (¬ i_1 = - 1%Z -> (∀(i_10 : Z), ¬ a_21 (shift a_6 i_10) = 0%Z -> ¬ a_21 (shift a_13 i_10) = 0%Z -> 0%Z ≤ i_10 -> i_10 < i_1 -> i_10 < l_size -> l_idle_cpu i_10 = 0%Z)) -> (i_1 = - 1%Z -> (∀(i_10 : Z), ¬ a_21 (shift a_6 i_10) = 0%Z -> ¬ a_21 (shift a_13 i_10) = 0%Z -> 0%Z ≤ i_10 -> i_10 < i_9 -> i_10 < l_size -> l_idle_cpu i_10 = 0%Z)) -> ((∃(i_10 : Z), ¬ a_21 (shift a_17 i_10) = 0%Z ∧ ¬ a_21 (shift a_6 i_10) = 0%Z ∧ i_10 < l_size ∧ x_4 ≤ i_10) -> (∀(i_10 : Z), i_10 < i_8 -> x_4 ≤ i_10 -> a_21 (shift a_17 i_10) = 0%Z ∨ a_21 (shift a_6 i_10) = 0%Z)) -> (¬ i_1 = - 1%Z -> (∀(i_10 : Z), ¬ a_21 (shift a_6 i_10) = 0%Z -> ¬ a_21 (shift a_13 i_10) = 0%Z -> 0%Z ≤ i_10 -> i_1 ≤ i_10 -> i_10 < i_9 -> i_10 < l_size -> ¬ p_idle_core t_10 a_21 i_10)) -> (¬ i_1 = - 1%Z -> (∀(i_10 : Z), ¬ a_21 (shift a_13 i_10) = 0%Z -> 0%Z ≤ i_10 -> i_10 < l_size -> ¬ a_21 (shift a_17 i_10) = 0%Z ∨ ¬ p_idle_core t_10 a_21 i_10)) -> i_4 = 0%Z ∨ i_4 = 1%Z -> (∀(i_10 : Z), 0%Z ≤ i_10 -> i_10 < l_size -> separated a_19 l_size (shift (t_10 (shift (shift a i_10) 0%Z)) 0%Z) l_size) -> (∀(i_10 : Z), let a_31 : addr := shift a i_10 in 0%Z ≤ i_10 -> i_10 < l_size -> valid_rd t a_31 1%Z ∧ valid_rw t (shift (t_10 (shift a_31 0%Z)) 0%Z) l_size) -> (∀(i_10 : Z), 0%Z ≤ i_10 -> i_10 < l_size -> (¬ a_20 (shift a_13 i_10) = 0%Z) = (¬ a_20 (shift a_17 i_10) = 0%Z)) -> (∀(i_10 : Z), ¬ a_21 (shift a_17 i_10) = 0%Z -> 0%Z ≤ i_10 -> i_10 < l_size -> ¬ a_21 (shift a_13 i_10) = 0%Z) -> (∀(a_31 : addr), let a_32 : addr := l_sched_group_cpus a_31 in let a_33 : addr := shift (t_10 (shift a_32 0%Z)) 0%Z in valid_rd t a_32 1%Z ∧ valid_rd t a_33 l_size ∧ (∀(i_10 : Z), 0%Z ≤ i_10 -> i_10 < l_size -> separated a_33 l_size (shift (t_10 (shift (shift a i_10) 0%Z)) 0%Z) l_size)) -> (∀(a_31 : addr), let a_32 : addr := l_sched_group_mask a_31 in let a_33 : addr := shift (t_10 (shift a_32 0%Z)) 0%Z in valid_rd t a_32 1%Z ∧ valid_rd t a_33 l_size ∧ (∀(i_10 : Z), 0%Z ≤ i_10 -> i_10 < l_size -> separated a_33 l_size (shift (t_10 (shift (shift a i_10) 0%Z)) 0%Z) l_size)) -> (∀(a_31 : addr), let a_32 : addr := l_group_balance_mask a_31 in let a_33 : addr := shift (t_10 (shift a_32 0%Z)) 0%Z in valid_rd t a_32 1%Z ∧ valid_rd t a_33 l_size ∧ (∀(i_10 : Z), 0%Z ≤ i_10 -> i_10 < l_size -> separated a_33 l_size (shift (t_10 (shift (shift a i_10) 0%Z)) 0%Z) l_size)) -> (∀(i_10 : Z), let a_31 : addr := l_cpu_smt_mask i_10 in let a_32 : addr := shift (t_10 (shift a_31 0%Z)) 0%Z in 0%Z ≤ i_10 -> i_10 < l_size -> valid_rd t a_31 1%Z ∧ valid_rd t a_32 l_size ∧ (∀(i_11 : Z), 0%Z ≤ i_11 -> i_11 < l_size -> separated a_32 l_size (shift (t_10 (shift (shift a i_11) 0%Z)) 0%Z) l_size)) -> ¬ p_idle_core t_10 t_9 i_5.
Admitted.
