@inproceedings{PearsonEtALICSE2017,
 author = {Pearson, Spencer and Campos, Jos{\'e} and Just, Ren{\'e} and Fraser, Gordon and Abreu, Rui and Ernst, Michael D. and Pang, Deric and Keller, Benjamin},
 title = {Evaluating and Improving Fault Localization},
 booktitle = {ICSE},
 LONGbooktitle = {Proceedings of the 39th International Conference on Software Engineering},
 year = {2017},
 LONGpages = {609--620},
}
              


@misc{stanzeromatrixdimbug,
  key = {Stan Commit 5224850},
  LONGtitle = {StanCommit5224850},
  year = {2015},
  note = "\url{https://github.com/stan-dev/stan/commit/5224850}"
}
@misc{entropyBug,
  key = {Edward Commit 002a27e},
  LONGtitle = {EdwardCommit002a27e},
  year = {2016},
  note = "\url{https://github.com/blei-lab/edward/commit/002a27e}"
}
@misc{pyrolossnanbug,
  key = {Pyro Commit 8c14f36},
  LONGtitle = {PyroCommit8c14f36},
  year = {2017},
  note = "\url{https://github.com/uber/pyro/commit/8c14f36}"
}
@misc{stanstepsizebug,
  key = {Stan Commit 04fcb74},
  LONGtitle = {StanCommit04fcb74},
  year = {2013},
  note = "\url{https://github.com/stan-dev/stan/commit/04fcb74}"
}
@misc{stananx,
  key = {Stan Commit 5845db97},
  LONGtitle = {StanCommit5845db97},
  year = {2016},
  note = "\url{https://github.com/stan-dev/stan/commit/5845db9}"
}
@misc{edwardanx,
  key = {Edward Commit c9afcb1f},
  LONGtitle = {EdwardCommitc9afcb1f},
  year = {2017},
  note = "\url{https://github.com/blei-lab/edward/commit/c9afcb1}"
}
@misc{offbyonebug2,
  key = {Stan Commit b8d5086},
  LONGtitle = {StanCommitb8d5086},
  year = {2013},
  note = "\url{https://github.com/stan-dev/stan/commit/b8d5086}"
}
@misc{offbyonebug,
  key = {Stan Commit 40c8224},
  LONGtitle = {StanCommit40c8224},
  year = {2016},
  note = "\url{https://github.com/stan-dev/stan/commit/40c8224}"
}
@misc{pyrobernoullibug,
  key = {Pyro Commit f5a51fe},
  LONGtitle = {PyroCommitf5a51fe},
  year = {2017},
  note = "\url{https://github.com/uber/pyro/commit/f5a51f}"
}
@misc{wrongDimensionBug,
  key = {Pyro Issue 303},
  LONGtitle = {PyroIssue303},
  year = {2017},
  note = "\url{https://github.com/uber/pyro/issues/303}"
}
@misc{compilationBug,
  key = {Stan Commit ae423b2},
  LONGtitle = {Stan2101},
  year = {2017},
  note = "\url{https://github.com/stan-dev/stan/commit/ae423b2}"
}

@misc{wrongForwardingBug,
  key = {Pyro Commit a59b436},
  LONGtitle = {Pyro574},
  year = {2017},
  note = "\url{https://github.com/uber/pyro/commit/a59b436}"
}

@misc{realReturnInsteadOfArrayBug,
  key = {Stan Commit 2fc94d4},
  LONGtitle = {Stan2410},
  year = {2017},
  note = "\url{https://github.com/stan-dev/stan/commit/2fc94d4}"
}

@misc{statefulInferenceBug,
  key = {Edward Commit 10118db},
  LONGtitle = {Edward Bug347},
  year = {2016},
  note = "\url{https://github.com/blei-lab/edward/commit/10118db}"
}

@misc{nanBug,
  key = {Stan Commit 99289c85},
  LONGtitle = {Stan1610},
  year = {2015},
  note = "\url{https://github.com/stan-dev/stan/commit/99289c85}"
}

@misc{infinityBug2,
  key = {Pyro Commit 7b6cf58},
  LONGtitle = {Pyro436},
  year = {2017},
  note = "\url{https://github.com/uber/pyro/commit/7b6cf58}"
}

@misc{infinityBug1,
  key = {Edward Commit 3616d41},
  LONGtitle = {Edward Commit93},
  year = {2016},
  note = "\url{https://github.com/blei-lab/edward/commit/3616d41}"
}

@misc{regressionBug,
  key = {Stan Commit 7a98bd2},
  LONGtitle = {Stan1906},
  year = {2016},
  note = "\url{https://github.com/stan-dev/stan/commit/7a98bd2}"
}

@misc{wrongFormulaBug,
  key = {Edward Commit fe01657},
  LONGtitle = {EdwardCommitfe01657},
  year = {2016},
  note = "\url{https://github.com/blei-lab/edward/commit/fe01657}"
}

@misc{missingTermBugEdward,
  key = {Edward Commit 79f4193},
  LONGtitle = {EdwardBug722},
  year = {2017},
  note = "\url{https://github.com/blei-lab/edward/commit/79f4193}"
}

@misc{missingTermBugPyro,
  key = {Pyro Commit 6e26f5e},
  LONGtitle = {PyroPull205},
  year = {2017},
  note = "\url{https://github.com/uber/pyro/commit/6e26f5e}"
}

@misc{singleElementFillBug,
  key = {Pyro Commit 0f1d27e},
  LONGtitle = {Pyro302},
  year = {2017},
  note = "\url{https://github.com/uber/pyro/commit/0f1d27e}"
}

@misc{doubleCountBug,
  key = {Pyro Commit b94f06a},
  LONGtitle = {Pyro351},
  year = {2017},
  note = "\url{https://github.com/uber/pyro/commit/b94f06a}"
}

@misc{renormalizationBug,
  key = {Edward Commit 972a9d9},
  LONGtitle = {EdwardBug765},
  year = {2017},
  note = "\url{https://github.com/blei-lab/edward/commit/972a9d9}"
}

@misc{edwardcommita,
  key = {Edward commit 79f4193},
  LONGtitle = {EdwardCommit79f4193},
  year = {2017},
  note = "\url{https://github.com/blei-lab/edward/commit/79f4193}"
}

@misc{edwardcommitb,
  key = {Edward commit 43d8a39},
  LONGtitle = {EdwardCommit43d8a39},
  year = {2016},
  note = "\url{https://github.com/blei-lab/edward/commit/43d8a39}"
}

@misc{edwardcommitc,
  key = {Edward commit 3616d41},
  LONGtitle = {EdwardCommit3616d41},
  year = {2016},
  note = "\url{https://github.com/blei-lab/edward/commit/3616d41}"
}

@misc{pyrocommita,
  key = {Pyro commit 7b6cf58},
  LONGtitle = {PyroCommit7b6cf58},
  year = {2017},
  note = "\url{https://github.com/uber/pyro/commit/7b6cf58}"
}
@misc{pyrocommitb,
  key = {Pyro commit 3671b06},
  LONGtitle = {PyroCommit3671b06},
  year = {2017},
  note = "\url{https://github.com/uber/pyro/commit/3671b06}"
}

@misc{stancommitb,
  key = {Stan commit 45a82fd},
  LONGtitle = {StanCommit45a82fd},
  year = {2015},
  note = "\url{https://github.com/stan-dev/stan/commit/45a82fd}"
}


@misc{EdwardExampleBug,
  key = {{SGLD} produces {Nan} in output},
  LONGtitle = {EdwardExampleBug},
  year = {2018},
  LONGmonth = {March},
  note = "\url{https://github.com/blei-lab/edward/issues/859}"
}

@misc{PyroExampleBug,
  key = {Domain Error in arguments},
  LONGtitle = {PyroExampleBug},
  year = {2018},
  LONGmonth = {March},
  note = "\url{https://github.com/uber/pyro/issues/875}"
}

@misc{StanExampleBug,
  key = {Stan throws error with empty array},
  LONGtitle = {StanExampleBug},
  year = {2018},
  LONGmonth = {Feb},
  note = "\url{https://github.com/stan-dev/pystan/issues/437}"
}

@online{StanCheckBoundaryIssue,
  key = "{{Stan Issue 603}}",
  LONGtitle = "StanCheckBoundaryIssue",
  author = "Bob Carpenter",
  year = {2017},
  note = "\url{https://github.com/stan-dev/stan/issues/603}",
  lastaccessed = "March 8, 2018",
}

@inproceedings{hariri2018approximate,
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  booktitle={ICST},
  year={2018}
}

@inproceedings{Cusumano-TownerEtAlPLDI2018,
 author = {Marco Cusumano-Towner and Benjamin Bichsel and Timon Gehr and Vikash K. Mansinghka and Martin Vechev},
 title = {Incremental Inference for Probabilistic Programs},
 booktitle = {PLDI},
 year = {2018},
 pages = {Conditionally Accepted},
}

@inproceedings{VikashEtAlPLDI2018,
 author = {Vikash Mansinghka and Ulrich Schaechtle and Shivam Handa and Alexey Radul and Yutian Chen and Martin Rinard},
 title = {Custom Inference Strategies for Probabilistic Programming Languages},
 booktitle = {PLDI},
 year = {2018},
 pages = {Conditionally Accepted},
}

@ARTICLE{zhusuan2017,
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@inproceedings{ArcuriAndBriandUsingStatisticalTests,
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@article{liu2014effectively,
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@InProceedings{psiPaper2,
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@inproceedings{TanejaEtAlMiTV,
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@inproceedings{HollerEtAlFuzzingWithCodeFragments,
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@inproceedings{LeETALRandomizedISSTA2015,
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@inproceedings{LidburyETALManyCoreCompilerFuzzing,
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@inproceedings{ASTGenPaper,
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@inproceedings{sen2005vesta,
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@inproceedings{filieri2011run,
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@inproceedings{han2007counterexamples,
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  year={2007},
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@inproceedings{VardiSFCS85, 
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@inproceedings{ChenETAL2016DifferentialTestingJVM,
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@inproceedings{ChenETAL2013TamingCompilerFuzzers,
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@article{jackson1996elements,
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annote = {Per acabar de llegir},
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title = {{Designing Chip-Level Nanophotonic Interconnection Networks}},
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year = {2012}
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year = {2015}
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keywords = {0,fine grain synchronization,i,idx,many core,n,pragma omp parallel,private,ran,shared,size,ssb,y},
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@inproceedings{nicepaper2,
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}

@inproceedings{nicepaper3,
  author = "Firstname1 Lastname1 and Firstname2 Lastname2 and Firstname3 Lastname3 and Firstname4 Lastname4 and Firstname5 Lastname5",
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@inproceedings{Mondal2017,
author = {Mondal, Hemanta Kumar and Kaushik, Shashwat and Gade, Sri Harsha and Deb, Sujay},
booktitle = {Proceedings of the VLSID '17},
doi = {10.1109/VLSID.2017.42},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Mondal et al. - 2017 - Energy-Efficient Transceiver for Wireless NoC.pdf:pdf},
isbn = {9781509057405},
keywords = {Energy-efficient transceiver,impacts of power gating,seamless on-chip communication,wireless network-on-chip},
pages = {87--92},
title = {{Energy-Efficient Transceiver for Wireless NoC}},
year = {2017}
}

@inproceedings{MCPAT,
author = {Li, Sheng and Ahn, Jung Ho and Strong, R.D. and Brockman, J.B. and Tullsen, D.M. and Jouppi, N.P.},
booktitle = {Proceedings of the MICRO-42},
doi = {10.1145/1669112.1669172},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Li et al. - 2009 - McPAT An integrated power, area, and timing modeling framework for multicore and manycore architectures.pdf:pdf},
isbn = {978-1-60558-798-1},
issn = {1072-4451},
keywords = {Performance,Verification},
pages = {469--480},
title = {{McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures}},
year = {2009}
}


@inproceedings{bienia2008parsec,
  title={The PARSEC benchmark suite: Characterization and architectural implications},
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  pages={72--81},
  year={2008},
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}

@inproceedings{ahmad2015crono,
  title={Crono: A benchmark suite for multithreaded graph algorithms executing on futuristic multicores},
  author={Ahmad, Masab and Hijaz, Farrukh and Shi, Qingchuan and Khan, Omer},
  booktitle={Workload Characterization (IISWC), 2015 IEEE International Symposium on},
  pages={44--55},
  year={2015},
  organization={IEEE}
}

@article{Saxena2017,
author = {Saxena, Saurabh and Shu, Guanghua and Nandwana, Romesh Kumar and Talegaonkar, Mrunmay and Elkholy, Ahmed and Anand, Tejasvi and Choi, Woo Seok and Hanumolu, Pavan Kumar},
doi = {10.1109/JSSC.2016.2645738},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Saxena et al. - 2017 - A 2.8 mWGbs, 14 Gbs Serial Link Transceiver.pdf:pdf},
issn = {00189200},
journal = {IEEE Journal of Solid-State Circuits},
keywords = {Charge-based flip-flop (CFF),digital clock and data recovery (CDR),voltage-mode (VM) transmitter (Tx)},
number = {5},
pages = {1399--1411},
title = {{A 2.8 mW/Gb/s, 14 Gb/s Serial Link Transceiver}},
volume = {52},
year = {2017}
}

@article{Xu2017,
abstract = {— This paper presents a power-and area-efficient 16-way time-interleaved (TI) analog-to-digital converter (ADC) achieving 24-GS/s conversion speed and 6-bit resolution in 28-nm CMOS. A voltage-time hybrid pipeline technique exploit-ing the comparator input-voltage-output-time dependency is reported to enhance the throughput of successive-approximation-register (SAR) ADCs. A reference-buffer-free capacitive digital-to-analog (CDAC) converter is utilized to mitigate the crosstalk problem in TI-ADCs. Timing mismatches between individual sub-ADCs are estimated with a reference-ADC dithering technique and corrected by digitally controlled delay lines (DCDL). The techniques collectively enabled a very compact design, obviating any input buffer or hierarchical sampling structures. The ADC core consumes 23 mW and occupies an area of 0.03 mm 2 . A signal-to-noise plus distortion ratio (SNDR) of 35 dB and a spurious-free dynamic range (SFDR) of 54 dB were measured for a 40-MHz input. For a Nyquist input, the prototype measured an SNDR of 29 dB and an SFDR of 41 dB with all timing mismatch spurs suppressed below −50 dBc after skew calibration.},
author = {Xu, Benwei and Zhou, Yuan and Chiu, Yun},
doi = {10.1109/JSSC.2016.2642204},
file = {:C$\backslash$:/Users/Sergi/Dropbox/9. POSTDOC DOCUMENTATION/24GSps6BitADC{\_}YunChiu{\_}JSSC2017.pdf:pdf},
issn = {00189200},
journal = {IEEE Journal of Solid-State Circuits},
keywords = {ADC,SAR ADC,TDC,background calibration,comparator,crosstalk,skew calibration,time interleaving,voltage-time hybrid},
number = {4},
pages = {1091--1100},
title = {{A 23-mW 24-GS/s 6-bit Voltage-Time Hybrid Time-Interleaved ADC in 28-nm CMOS}},
volume = {52},
year = {2017}
}

@inproceedings{DSENT,
author = {Sun, Chen and Chen, CHO and Kurian, George},
booktitle = {Proceedings of the NoCS '12},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Sun, Chen, Kurian - 2012 - DSENT - A Tool Connecting Emerging Photonics with Electronics for Opto-electronic Networks-on-Chip Modeling.pdf:pdf},
pages = {201--210},
title = {{DSENT - A Tool Connecting Emerging Photonics with Electronics for Opto-electronic Networks-on-Chip Modeling}},
year = {2012}
}

@inproceedings{Boyapati2017,
author = {Boyapati, Rahul and Huang, Jiayi and Majumder, Pritam and Yum, Ki Hwan and Kim, Eun Jung},
booktitle = {Proceedings of the ISCA},
doi = {10.1145/3079856.3080241},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Boyapati et al. - 2017 - APPROX-NoC A Data Approximation Framework for Network-On-Chip Architectures.pdf:pdf},
isbn = {978-1-4503-4892-8},
keywords = {Approximate Computing,Data Compression,Networks-On-Chip},
pages = {666--677},
title = {{APPROX-NoC: A Data Approximation Framework for Network-On-Chip Architectures}},
year = {2017}
}

@inproceedings{Li2016,
abstract = {With increasing core counts and higher memory demands from applications, it is imperative that networks-on-chip (NoCs) provide low-latency, power-efficient communication. Conventional NoCs tend to be over-provisioned for worst-case bandwidth demands leading to ineffective use of network resources and significant power inefficiency; average channel utilization is typically less than 5{\%} in real-world applications. In terms of performance, low-latency techniques often introduce power and area overheads and incur significant complexity in the router microarchitecture. We find that both low latency and power efficiency are possible by relaxing the constraint of lossless communication. This is inspired from internetworking where best effort delivery is commonplace. We propose the Runahead NoC, a lightweight, lossy network that provides single-cycle hops. Allowing for lossy delivery enables an extremely simple bufferless router microarchitecture that performs routing and arbitration within the same cycle as link traversal. The Runahead NoC operates either as a power-saver that is integrated into an existing conventional NoC to improve power efficiency, or as an accelerator that is added on top to provide ultra-low latency communication for select packets. On a range of PAR-SEC and SPLASH-2 workloads, we find that the Runahead NoC reduces power consumption by 1.81 as a power-saver and improves runtime and packet latency by 1.08?? and 1.66?? as an accelerator.},
author = {Li, Z and Miguel, J S and Jerger, N E},
booktitle = {Proceedings of the HPCA-22},
doi = {10.1109/HPCA.2016.7446076},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Li, Miguel, Jerger - 2016 - The runahead network-on-chip.pdf:pdf},
isbn = {9781467392112},
issn = {15300897},
pages = {333--344},
title = {{The runahead network-on-chip}},
year = {2016}
}

@inproceedings{Nychis2012,
annote = {Reference for the computer architecture world.


To read from Section 4 on.},
author = {Nychis, GP and Fallin, Chris and Moscibroda, Thomas},
booktitle = {Proceedings of the SIGCOMM},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Nychis, Fallin, Moscibroda - 2012 - On-chip networks from a networking perspective congestion and scalability in many-core interconnects.pdf:pdf},
isbn = {9781450314190},
keywords = {congestion control,multi-core,on-chip networks},
pages = {407--18},
title = {{On-chip networks from a networking perspective: congestion and scalability in many-core interconnects}},
year = {2012}
}

@inproceedings{Daya2016,
author = {Daya, Bhavya K and Peh, Li-shiuan and Chandrakasan, Anantha P},
booktitle = {Proceedings of the DAC-53},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Daya, Peh, Chandrakasan - 2016 - Quest for High-Performance Bufferless NoCs with Single-Cycle Express Paths and Self-Learning Throttling.pdf:pdf},
isbn = {9781450342360},
pages = {Art. 36},
title = {{Quest for High-Performance Bufferless NoCs with Single-Cycle Express Paths and Self-Learning Throttling}},
year = {2016}
}

@article{Mittal2016,
abstract = {Approximate computing trades off computation quality with the effort expended and as rising performance demands confront with plateauing resource budgets, approximate computing has become, not merely attractive, but even imperative. In this paper, we present a survey of techniques for approximate computing (AC). We discuss strategies for finding approximable program portions and monitoring output quality, techniques for using AC in different processing units (e.g., CPU, GPU and FPGA), processor components, memory technologies etc., and programming frameworks for AC. We classify these techniques based on several key characteristics to emphasize their similarities and differences. The aim of this paper is to provide insights to researchers into working of AC techniques and inspire more efforts in this area to make AC the mainstream computing approach in future systems. A Survey Of Techniques for Approximate Computing (PDF Download Available). Available from: https://www.researchgate.net/publication/290194892{\_}A{\_}Survey{\_}Of{\_}Techniques{\_}for{\_}Approximate{\_}Computing [accessed May 30, 2016].},
archivePrefix = {arXiv},
arxivId = {arXiv:1011.1669v3},
author = {Mittal, Sparsh},
doi = {10.1017/CBO9781107415324.004},
eprint = {arXiv:1011.1669v3},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Mittal - 2016 - A Survey of Techniques for Approximate Computing.pdf:pdf},
isbn = {9788578110796},
issn = {1098-6596},
journal = {ACM Computing Surveys (CSUR)},
keywords = {icle},
number = {4},
pages = {Art. 62},
pmid = {25246403},
title = {{A Survey of Techniques for Approximate Computing}},
volume = {48},
year = {2016}
}

@inproceedings{Kurian2010,
annote = {Check short papers for some nice points.


The motivation is the same than ours.},
author = {Kurian, George and Miller, J.E. and Psota, James and Eastep, Jonathan and Liu, Jifeng and Michel, Jurgen and Kimerling, L.C. and Agarwal, Anant},
booktitle = {Proceedings of the PACT},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Kurian et al. - 2010 - ATAC A 1000-Core Cache-Coherent Processor with On-Chip Optical Network.pdf:pdf},
isbn = {9781450301787},
keywords = {cache coherence,network-on-chip,photonic interconnect},
pages = {477--488},
title = {{ATAC: A 1000-Core Cache-Coherent Processor with On-Chip Optical Network}},
year = {2010}
}



@article{Sun2015,
author = {Sun, Chen and Wade, Mark T. and Lee, Yunsup and Orcutt, Jason S. and Alloatti, Luca and Georgas, Michael S. and Waterman, Andrew S. and Shainline, Jeffrey M. and Avizienis, Rimas R. and Lin, Sen and Moss, Benjamin R. and Kumar, Rajesh and Pavanello, Fabio and Atabaki, Amir H. and Cook, Henry M. and Ou, Albert J. and Leu, Jonathan C. and Chen, Yu-Hsin and Asanovi{\'{c}}, Krste and Ram, Rajeev J. and Popovi{\'{c}}, Milo{\v{s}} A. and Stojanovi{\'{c}}, Vladimir M.},
doi = {10.1038/nature16454},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Sun et al. - 2015 - Single-chip microprocessor that communicates directly using light.pdf:pdf},
isbn = {0028-0836},
issn = {0028-0836},
journal = {Nature},
number = {7583},
pages = {534--538},
publisher = {Nature Publishing Group},
title = {{Single-chip microprocessor that communicates directly using light}},
volume = {528},
year = {2015}
}

@inproceedings{AbadalASPLOS,
author = {Abadal, Sergi and Alarc{\'{o}}n, Eduard and Cabellos-Aparicio, Albert and Torrellas, Josep},
booktitle = {Proceedings of the ASPLOS '16},
pages = {3--17},
title = {{WiSync: An Architecture for Fast Synchronization through On-Chip Wireless Communication}},
year = {2016}
}

@article{nguyen2005using,
  title={Using cyclic memory allocation to eliminate memory leaks},
  author={Nguyen, Huu Hai and Rinard, Martin},
  year={2005}
}



@inproceedings{samadi2014paraprox,
  title={Paraprox: pattern-based approximation for data parallel applications},
  author={Samadi, Mehrzad and Jamshidi, Davoud Anoushe and Lee, Janghaeng and Mahlke, Scott},
  booktitle={In 19th International Conference on Architectural Support for Programming Languages and Operating Systems},
  year={2014},
  organization={Citeseer}
}


@article{Duraisamy2016,
abstract = {With its applicability spanning numerous data-driven fields, the implementation of graph analytics on multicore platforms is gaining momentum. One of the most important components of a multicore chip is its communication backbone. Due to inherent irregularities in data movements manifested by graph-based applications, it is essential to design efficient on-chip interconnection architectures for multicore chips performing graph analytics. In this article, we present a detailed analysis of the traffic patterns generated by graph-based applications when mapped to multicore chips. Based on this analysis, we explore the design-space for the Network-on-Chip (NoC) architecture to enable an efficient implementation of graph analytics. We principally consider three types of NoC architectures, viz., traditional mesh, small-world, and high-radix networks. We demonstrate that the small-world-network-enabled wireless NoC (WiNoC) is the most suitable platform for executing the considered graph applications. The WiNoC achieves an average of 38{\%} and 18{\%} full-system Energy Delay Product savings compared to wireline-mesh and high-radix NoCs, respectively.},
author = {Duraisamy, Karthi and Lu, Hao and Pande, Partha Pratim and Kalyanaraman, Ananth},
doi = {10.1145/2961027},
file = {:C$\backslash$:/Users/Sergi/Dropbox/9. POSTDOC DOCUMENTATION/Duraisamy{\_}TECS16.pdf:pdf},
issn = {15583465},
journal = {ACM Trans. Embed. Comput. Syst},
keywords = {CCS Concepts,Graph analytics,Network on chip Additional Key Words and Phrases,community detection,graph coloring,r Hardware → Radio frequency and wireless circuits,r Mathematics of computing → Graph algorithms,wireless NoCs},
number = {26},
pages = {1--26},
title = {{High-Performance and Energy-Efficient Network-on-Chip Architectures for Graph Analytics}},
volume = {15},
year = {2016}
}

@inproceedings{Duraisamy2017APPROX,
abstract = {Community detection is an advanced graph operation that is used to reveal tightly-knit groups of vertices (aka. communities) in real-world networks. Given the intractability of the problem, efficient heuristics are used in practice. Yet, even the best of these state-of-the-art heuristics can become computationally demanding over large inputs and can generate workloads that exhibit inherent irregularity in data movement on manycore platforms. In this paper, we posit that effective acceleration of the graph community detection operation can be achieved by reducing the cost of data movement through a combined innovation at both software and hardware levels. More specifically, we first propose an efficient software-level parallelization of community detection that uses approximate updates to cleverly exploit a diminishing returns property of the algorithm. Secondly, as a way to augment this innovation at the software layer, we design an efficient Wireless Network on Chip (WiNoC) architecture that is suited to handle the irregular on-chip data movements exhibited by the community detection algorithm under both unicast-and broadcast-heavy cache coherence protocols. Experimental results show that our resulting WiNoC-enabled manycore platform achieves on average 52{\%} savings in execution time, without compromising on the quality of the outputs, when compared to a traditional manycore platform designed with a wireline mesh NoC and running community detection without employing approximate updates.},
author = {Duraisamy, Karthi and Lu, Hao and Pande, Partha Pratim and {Aananth Kalyanaraman}},
booktitle = {Proceedings of the DAC '17},
doi = {10.1145/3061639.3062194},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Duraisamy, Lu - Unknown - Accelerating Graph Community Detection with Approximate Updates via an Energy-Efficient NoC.pdf:pdf},
isbn = {9781450349277},
issn = {0738100X},
keywords = {graph community detection,wireless network-on-chip},
pages = {Art. 89},
title = {{Accelerating Graph Community Detection with Approximate Updates via an Energy-Efficient NoC}},
year = {2017}
}

@article{Clark1978,
abstract = {Within a restricted area such as a single building, or a small cluster of buildings, high-speed (greater than 1 Mbit/s) data transmission is available at a small fraction of the cost of obtaining comparable longhaul service from a tariffed common carrier. Local area networks use this low-east, high-speed transmission capabality as the basis for a general-purpose data transfer network. There are two basic issues in local area network design. First, how should the hardware realizing the network be organized to provide reliable high-speed communication at minimum cost? With the low cost of the raw transmission capability, care is required to keep the associated hardware costs correspondingly low. Second, what protocols should be used for the operation of the network? While many protocol problems are common to local area networks and long-haul networks such as the ARPANET, new protocols are required to exploit the extended capabilities of local area networks. This paper addresses these two basic issues. It also considers the interconnection of local area networks and long-haul networks and presents a case study which describes in detail the host computer interface hard-ware required for a typical local area network.},
author = {Clark, D.D. and Pogran, K.T. and Reed, D.P.},
doi = {10.1109/PROC.1978.11152},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Clark, Pogran, Reed - 1978 - An introduction to local area networks.pdf:pdf},
issn = {0018-9219},
journal = {Proceedings of the IEEE},
keywords = {ARPANET,Application software,Communication networks,Communication system control,Computer networks,Data communication,Hardware,Local area networks,Optical fiber LAN,Protocols},
number = {11},
pages = {1497--1517},
pmid = {8847465},
title = {{An introduction to local area networks}},
volume = {66},
year = {1978}
}

@techreport{CACTI,
abstract = {Future processors will likely have large on-chip caches with a possibility of dedicating an entire die for on-chip storage in a 3D stacked design. With the ever growing disparity between transistor and wire delay, the properties of such large caches will primarily depend on the characteristics of the interconnection networks that connect various sub-modules of a cache. CACTI 6.0 is a significantly enhanced version of the tool that primarily focuses on interconnect design for large caches. In addition to strengthening the existing analytical model of the tool for dominant cache components, CACTI 6.0 includes two major extensions over earlier versions: first, the ability to model Non-Uniform Cache Access (NUCA), and second, the ability to model different types of wires, such as RC based wires with different power, delay, and area characteristics and differential low-swing buses. This report details the analytical model assumed for the newly added modules along with their validation analysis.},
author = {Muralimanohar, Naveen and Balasubramonian, Rajeev and Jouppi, Norman P},
booktitle = {HP Laboratories},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Muralimanohar, Balasubramonian, Jouppi - 2009 - CACTI 6.0 A Tool to Model Large Caches.pdf:pdf},
keywords = {no keywords available,s},
title = {{CACTI 6.0: A Tool to Model Large Caches}},
year = {2009}
}

@inproceedings{Ubal2012,
abstract = {Accurate simulation is essential for the proper design and evalu- ation of any computing platform. Upon the current move toward the CPU-GPU heterogeneous computing era, researchers need a simulation framework that can model both kinds of computing de- vices and their interaction. In this paper, we present Multi2Sim, an open-source, modular, and fully configurable toolset that enables ISA-level simulation of an x86 CPU and anAMDEvergreen GPU. Focusing on a model of the AMD Radeon 5870 GPU, we address program emulation correctness, as well as architectural simulation accuracy, using AMD's OpenCL benchmark suite. Simulation ca- pabilities are demonstrated with a preliminary architectural explo- ration study, and workload characterization examples. The project source code, benchmark packages, and a detailed user's guide are publicly available at www.multi2sim.org.},
author = {Ubal, Rafael and Mistry, Perhaad and Schaa, Dana and Ave, Huntington and Kaeli, David},
booktitle = {Proceedings of the PACT '12},
doi = {10.1145/2370816.2370865},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Ubal et al. - 2012 - Multi2Sim A Simulation Framework for CPU-GPU Computing.pdf:pdf},
isbn = {9781450311823},
issn = {1089795X},
keywords = {amd,evergreen isa,gpu,multi2sim},
pages = {335--344},
title = {{Multi2Sim: A Simulation Framework for CPU-GPU Computing}},
year = {2012}
}

@article{Laha2015,
author = {Laha, Soumyasanta and Kaya, Savas and Matolak, David W. and Rayess, William and DiTomaso, Dominic and Kodi, Avinash},
doi = {10.1109/TCAD.2014.2379640},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Laha et al. - 2015 - A New Frontier in Ultralow Power Wireless Links Network-on-Chip and Chip-to-Chip Interconnects.pdf:pdf},
issn = {0278-0070},
journal = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
number = {2},
pages = {186--198},
title = {{A New Frontier in Ultralow Power Wireless Links: Network-on-Chip and Chip-to-Chip Interconnects}},
volume = {34},
year = {2015}
}

@article{AbadalMICRO,
author = {Abadal, Sergi and Sheinman, Benny and Katz, Oded and Markish, Ofer and Elad, Danny and Fournier, Yvan and Roca, Damian and Hanzich, Mauricio and Houzeaux, Guillaume and Nemirovsky, Mario and Alarc{\'{o}}n, Eduard and Cabellos-Aparicio, Albert},
journal = {IEEE MICRO},
number = {5},
pages = {52--61},
title = {{Broadcast-Enabled Massive Multicore Architectures: A Wireless RF Approach}},
volume = {35},
year = {2015}
}

@inproceedings{Markish2015,
author = {Markish, Ofer and Sheinman, Benny and Katz, Oded and Corcos, Dan and Elad, Danny},
booktitle = {Proceedings of the NoCS '15},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Markish et al. - 2015 - On-chip mmWave Antennas and Transceivers.pdf:pdf},
pages = {Art. 11},
title = {{On-chip mmWave Antennas and Transceivers}},
year = {2015}
}

@article{Matolak2012,
author = {Matolak, DW and Kodi, A and Kaya, Savas and DiTomaso, Dominic and Laha, Soumyasanta and Rayess, William},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Matolak et al. - 2012 - Wireless networks-on-chips architecture, wireless channel, and devices.pdf:pdf},
journal = {IEEE Wireless Communications},
number = {5},
title = {{Wireless networks-on-chips: architecture, wireless channel, and devices}},
volume = {19},
year = {2012}
}

@article{Rappaport2011,
author = {Rappaport, Theodore S. and Murdock, James N. and Gutierrez, Felix},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Rappaport, Murdock, Gutierrez - 2011 - State of the Art in 60-GHz Integrated Circuits and Systems for Wireless Communications.pdf:pdf},
journal = {Proceedings of the IEEE},
keywords = {adcs,analog-to-digital converters,broadband,circuits and systems,cmos integrated circuits,cmos process,communication,communication standards,ieee standards,in-,integrated circuit modeling,low-noise,package antennas},
number = {8},
pages = {1390--1436},
title = {{State of the Art in 60-GHz Integrated Circuits and Systems for Wireless Communications}},
volume = {99},
year = {2011}
}

@article{SeokTHz,
author = {Seok, Eunyoung and Shim, Dongha and Mao, Chuying and Han, Ruonan and Sankaran, Swaminathan and Cao, Changhua and Knap, Wojciech and O, Kenneth K.},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Seok et al. - 2010 - Progress and challenges towards terahertz CMOS integrated circuits.pdf:pdf},
journal = {IEEE Journal of Solid-State Circuits},
number = {8},
pages = {1554--1564},
title = {{Progress and challenges towards terahertz CMOS integrated circuits}},
volume = {45},
year = {2010}
}

@article{Deb2013,
annote = {Versi{\'{o}} llarga de 


"Enhancing performance of network-on-chip architectures with millimeter-wave wireless interconnects"


conjunt amb altres papers d'small world.},
author = {Deb, Sujay and Chang, Kevin and Yu, Xinmin and Sah, S P and Cosic, Miralem and Pande, Partha Pratim and Belzer, Benjamin and Heo, Deukhyoun},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Deb et al. - 2013 - Design of an Energy Efficient CMOS Compatible NoC Architecture with Millimeter-Wave Wireless Interconnects.pdf:pdf},
journal = {IEEE Transactions on Computers},
number = {12},
pages = {2382--2396},
title = {{Design of an Energy Efficient CMOS Compatible NoC Architecture with Millimeter-Wave Wireless Interconnects}},
volume = {62},
year = {2013}
}

@article{gorinova2019probabilistic,
  title={Probabilistic programming with densities in SlicStan: efficient, flexible, and deterministic},
  author={Gorinova, Maria I and Gordon, Andrew D and Sutton, Charles},
  journal={Proceedings of the ACM on Programming Languages},
  volume={3},
  number={POPL},
  pages={1--30},
  year={2019},
  publisher={ACM New York, NY, USA}
}

@inproceedings{Socher2014,
author = {Weissman, Nir and Socher, Eran},
booktitle = {Proceedings of the EuMIC '14},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Weissman, Socher - 2014 - 9mW 6Gbps Bi-directional 85-90GHz Transceiver in 65nm CMOS.pdf:pdf},
isbn = {9782874870361},
keywords = {65nm cmos,mm wave,transceiver},
pages = {25--28},
title = {{9mW 6Gbps Bi-directional 85-90GHz Transceiver in 65nm CMOS}},
year = {2014}
}

@article{Yu2014a,
abstract = {This paper presents a high-efficiency 60-GHz on-off keying (OOK) transmitter (TX) designed for wireless network-on-chip applications. Aiming at an intra-chip communication distance of 20 mm, the TX consists of a drive amplifier (DA), a high-speed OOK modulator, and a transformer-coupled voltage-controlled oscillator. For high efficiency, a common-source topology with a drain-to-gate neutralization technique is chosen for the DA. A detailed mathematical design methodology is derived for the neutralization technique. The bulk-driven OOK modulator employs a novel dual feedthrough cancellation technique, resulting in a 30-dB on-off ratio. Fabricated in a 65-nm bulk CMOS process, the TX consumes only 19 mW from a 1-V supply, and occupies an active area of 0.077 mm2. A maximum modulation data rate of 16 Gb/s with 0.75-dBm output power is demonstrated through measurements, which translates to a bit-energy efficiency of 1.2 pJ/bit.},
author = {Yu, Xinmin and Sah, Suman Prasad and Rashtian, Hooman and Mirabbasi, Shahriar and Pande, Partha Pratim and Heo, Deukhyoun},
doi = {10.1109/TMTT.2014.2347919},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Yu et al. - 2014 - A 1.2-pJbit 16-Gbs 60-GHz OOK Transmitter in 65-nm CMOS for Wireless Network-On-Chip.pdf:pdf},
issn = {0018-9480},
journal = {IEEE Transactions on Microwave Theory and Techniques},
keywords = {Bandwidth,Bulk driven,CMOS,CMOS integrated circuits,CMOS process,Couplings,DA,Modulation,OOK transmitter,Power generation,Transceivers,Wireless communication,amplitude shift keying,bit rate 16 Gbit/s,bit-energy efficiency,bulk-driven OOK modulator,common-source topology,drain-to-gate neutralization technique,drive amplifier,drive amplifier (DA),dual feedthrough cancellation technique,field effect MMIC,frequency 60 GHz,high-efficiency on-off keying,high-speed OOK modulator,intra-chip communication distance,low power,mathematical design methodology,millimeter wave,modulator,modulators,network-on-chip,neutralization,on–off keying (OOK),radio transmitters,size 20 mm,size 65 nm,transformer-coupled voltage-controlled oscillator,transmitter (TX),voltage 1 V,voltage-controlled oscillator (VCO),wireless network-on-chip (WiNoC)},
number = {10},
pages = {2357--2369},
title = {{A 1.2-pJ/bit 16-Gb/s 60-GHz OOK Transmitter in 65-nm CMOS for Wireless Network-On-Chip}},
volume = {62},
year = {2014}
}

@article{Yu2015,
author = {Yu, Xinmin and Rashtian, Hooman and Mirabbasi, Shahriar},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Yu, Rashtian, Mirabbasi - 2015 - An 18.7-Gbs 60-GHz OOK Demodulator in 65-nm CMOS for Wireless Network-on-Chip.pdf:pdf},
journal = {IEEE Transactions on Circuits And Systems -I: Regular Papers},
number = {3},
pages = {799--806},
title = {{An 18.7-Gb/s 60-GHz OOK Demodulator in 65-nm CMOS for Wireless Network-on-Chip}},
volume = {62},
year = {2015}
}

@article{Yu2014,
author = {Yu, Xinmin and Baylon, Joe and Wettin, Paul and Heo, Deukhyoun and {Pratim Pande}, Partha and Mirabbasi, Shahriar},
doi = {10.1109/MDAT.2014.2322995},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Yu et al. - 2014 - Architecture and Design of Multi-Channel Millimeter-Wave Wireless Network-on-Chip.pdf:pdf},
issn = {2168-2356},
journal = {IEEE Design {\&} Test},
number = {6},
pages = {19--28},
title = {{Architecture and Design of Multi-Channel Millimeter-Wave Wireless Network-on-Chip}},
volume = {31},
year = {2014}
}

@inproceedings{Chang2008Overlaid,
annote = {Reference paper for overlaid RF system.},
author = {Chang, M Frank and Cong, Jason and Kaplan, Adam and Naik, Mishali and Reinman, Glenn and Socher, Eran and Tam, Sai-Wang},
booktitle = {Proceedings of the HPCA-14},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Chang et al. - 2008 - CMP Network-on-Chip Overlaid With Multi-Band RF-Interconnect.pdf:pdf},
pages = {191--202},
title = {{CMP Network-on-Chip Overlaid With Multi-Band RF-Interconnect}},
year = {2008}
}

@article{AbadalToN,
author = {Abadal, Sergi and Iannazzo, Mario and Nemirovsky, Mario and Cabellos-Aparicio, Albert and Lee, Heekwan and Alarc{\'{o}}n, Eduard},
journal = {IEEE/ACM Transactions on Networking},
number = {5},
pages = {1501--13},
title = {{On the Area and Energy Scalability of Wireless Network-on-Chip: A Model-based Benchmarked Design Space Exploration}},
volume = {23},
year = {2015}
}

@article{Gutierrez2009,
abstract = {We present several on-chip antenna structures that may be fabricated with standard CMOS technology for use at millimeter wave frequencies. On-chip antennas for wireless personal area networks (WPANs) promise to reduce interconnection losses and greatly reduce wireless transceiver costs, while providing unprecedented flexibility for device manufacturers. We present the current state of research in on-chip integrated antennas, highlight several pitfalls and challenges for on-chip design, modeling, and measurement, and propose several antenna structures that derive from the microwave and HF communication fields. We also describe an experimental test apparatus for performing measurements on RFIC systems with on-chip antennas at The University of Texas at Austin.},
author = {Gutierrez, Felix and Agarwal, Shatam and Parrish, Kristen and Rappaport, Theodore S.},
doi = {10.1109/JSAC.2009.091007},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Gutierrez et al. - 2009 - On-chip integrated antenna structures in CMOS for 60 GHz WPAN systems.pdf:pdf},
isbn = {9781424441488},
issn = {07338716},
journal = {IEEE Journal on Selected Areas in Communications},
keywords = {60 GHz,CMOS,Millimeter wave,On-chip antenna,Passive radiating elements,RFIC,WPAN,mmWave communications},
number = {8},
pages = {1367--1378},
title = {{On-chip integrated antenna structures in CMOS for 60 GHz WPAN systems}},
volume = {27},
year = {2009}
}

@inproceedings{Jan2010,
abstract = {The impact of silicon technology scaling trends and the associated technological innovations on RF CMOS device characteristics are examined. The application of novel strained silicon and high-k/metal gate technologies not only benefits digital systems, but significantly improves RF performance. The peak cut-off frequency (f{\textless}inf{\textgreater}T{\textless}/inf{\textgreater}) doubles from 209 GHz in the 90 nm node to 445 GHz at the 32 nm node. 1/f flicker noise reduces by an order of magnitude from the 0.13 um node to the 32 nm node. Transistor noise figure, high voltage tolerance, and quality factors of RF passives all show similar benefits from technology scaling.},
author = {Jan, C. H. and Agostinelli, M. and Deshpande, H. and El-Tanani, M. a. and Hafez, W. and Jalan, U. and Janbay, L. and Kang, M. and Lakdawala, H. and Lin, J. and Lu, Y. L. and Mudanai, S. and Park, J. and Rahman, A. and Rizk, J. and Shin, W. K. and Soumyanath, K. and Tashiro, H. and Tsai, C. and VanDerVoorn, P. and Yeh, J. Y. and Bai, P.},
booktitle = {Proceedings of the IEEE IEDM},
doi = {10.1109/IEDM.2010.5703431},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Jan et al. - 2010 - RF CMOS technology scaling in high-kmetal gate era for RF SoC (system-on-chip) applications.pdf:pdf},
isbn = {9781424474196},
issn = {01631918},
pages = {604--607},
title = {{RF CMOS technology scaling in high-k/metal gate era for RF SoC (system-on-chip) applications}},
year = {2010}
}

@article{Fritsche2017,
author = {Fritsche, David and St{\"{a}}rke, Paul and Carta, Corrado and Ellinger, Frank},
doi = {10.1109/TMTT.2017.2677908},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Fritsche et al. - 2017 - A Low-Power SiGe BiCMOS 190-GHz Transceiver Chipset With Demonstrated Data Rates up to 50 Gbits Using On-Chip A.pdf:pdf},
journal = {IEEE Transactions on Microwave Theory and Techniques},
number = {99},
pages = {1--12},
title = {{A Low-Power SiGe BiCMOS 190-GHz Transceiver Chipset With Demonstrated Data Rates up to 50 Gbit/s Using On-Chip Antennas}},
volume = {PP},
year = {2017}
}

@inproceedings{Nakajima2015,
annote = {Experimentally demonstrated},
author = {Nakajima, Kensuke and Maruyama, Akihiro and Kohtani, Masato and Sugiura, Tsuyoshi and Otobe, Eiichiro and Lee, Jaejin and Cho, Shinhee and Kwak, Kyusub and Lee, Jeongseok and Yoshimasu, Toshihiko and Fujishima, Minoru},
booktitle = {Proceedings of the A-SSCC '14},
doi = {10.1109/ASSCC.2014.7008888},
file = {:C$\backslash$:/Users/Sergi/AppData/Local/Mendeley Ltd./Mendeley Desktop/Downloaded/Nakajima et al. - 2014 - 23Gbps 9.4pJbit 80100GHz band CMOS transceiver with on-board antenna for short-range communication.pdf:pdf},
isbn = {9781479940905},
keywords = {CMOS,antenna,data rate,millimeter-wave,transceiver},
pages = {173--176},
title = {{23Gbps 9.4pJ/bit 80/100GHz band CMOS transceiver with on-board antenna for short-range communication}},
year = {2014}
}

@inproceedings{sidiroglou2011managing,
  title={Managing performance vs. accuracy trade-offs with loop perforation},
  author={Sidiroglou-Douskos, Stelios and Misailovic, Sasa and Hoffmann, Henry and Rinard, Martin},
  booktitle={Proceedings of the 19th ACM SIGSOFT symposium and the 13th European conference on Foundations of software engineering},
  pages={124--134},
  year={2011},
  organization={ACM}
}

@inproceedings{chippa2013analysis,
  title={Analysis and characterization of inherent application resilience for approximate computing},
  author={Chippa, Vinay K and Chakradhar, Srimat T and Roy, Kaushik and Raghunathan, Anand},
  booktitle={Proceedings of the 50th Annual Design Automation Conference},
  pages={113},
  year={2013},
  organization={ACM}
}

@inproceedings{rinard2007using,
  title={Using early phase termination to eliminate load imbalances at barrier synchronization points},
  author={Rinard, Martin C},
  booktitle={Proceedings of the 2007 ACM International Conference on Object Oriented Programming Systems Languages \& Applications},
  year={2007},
  organization={ACM}
}


@inproceedings{rinard2006probabilistic,
  title={Probabilistic accuracy bounds for fault-tolerant computations that discard tasks},
  author={Rinard, Martin},
  booktitle={Proceedings of the 20th annual international conference on Supercomputing},
  pages={324--334},
  year={2006},
  organization={ACM}
}



@inproceedings{meng2009best,
  title={Best-effort parallel execution framework for recognition and mining applications},
  author={Meng, Jiayuan and Chakradhar, Srimat and Raghunathan, Anand},
  booktitle={Parallel \& Distributed Processing, 2009. IPDPS 2009. IEEE International Symposium on},
  pages={1--12},
  year={2009},
  organization={IEEE}
}

@inproceedings{renganarayana2012programming,
  title={Programming with relaxed synchronization},
  author={Renganarayana, Lakshminarayanan and Srinivasan, Vijayalakshmi and Nair, Ravi and Prener, Daniel},
  booktitle={Proceedings of the 2012 ACM workshop on Relaxing synchronization for multicore and manycore scalability},
  pages={41--50},
  year={2012},
  organization={ACM}
}

@inproceedings{misailovic2012dancing,
  title={Dancing with uncertainty},
  author={Misailovic, Sasa and Sidiroglou, Stelios and Rinard, Martin C},
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