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library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;


entity rom_10x10_inhlif2_ip is
    port (
        clka : in std_logic;
        addra : in std_logic_vector(3 downto 0);
        douta : out std_logic_vector(79 downto 0)
    );
end entity rom_10x10_inhlif2_ip;

architecture behavior of rom_10x10_inhlif2_ip is


    type rom_type is array (0 to 10) of std_logic_vector(79 downto 0);


    constant mem : rom_type := (
"00000000000000000000000000000000000000000000000000000000000000000000000000000000",
"00000000000000000000000000000000000000000000000000000000000000000000000000000000",
"00000000000000000000000000000000000000000000000000000000000000000000000000000000",
"00000000000000000000000000000000000000000000000000000000000000000000000000000000",
"00000000000000000000000000000000000000000000000000000000000000000000000000000000",
"00000000000000000000000000000000000000000000000000000000000000000000000000000000",
"00000000000000000000000000000000000000000000000000000000000000000000000000000000",
"00000000000000000000000000000000000000000000000000000000000000000000000000000000",
"00000000000000000000000000000000000000000000000000000000000000000000000000000000",
"00000000000000000000000000000000000000000000000000000000000000000000000000000000",
"00000000000000000000000000000000000000000000000000000000000000000000000000000000");

begin

    rom_behavior : process(clka )
    begin

        if clka'event and clka='1' 
        then

            douta <= mem(to_integer(unsigned(addra)));

        end if;

    end process rom_behavior;


end architecture behavior;

