Scan array solution for testing power and testing time

Lei Xu, Yihe Sun, Hongyi Chen

Abstract: Details a novel power estimation algorithm based on rate of bit propagation (RBP). Considering the reduction of RBP an advanced scan array architecture is proposed in which a wrapper and two dimensional scan chain is adopted. Estimated results based on RBP and experimental results of industrial circuits both show that testing power was reduced to the level of the functional power. Furthermore pseudo-BIST is integrated with the wrapper to reduce the test time.