DFM-aware Routing for Yield Enhancement

Xianlong Hong, Yici Cai, Hailong Yao, Duo Li

Abstract: As EDA industry advances to smaller and smaller technology nodes, a tighter link between VLSI circuit manufacturing and physical design is becoming a necessity. This paper introduces several design for manufacturability (DFM) related problems such as critical area reduction, redundant via insertion, chemical-mechanical polishing (CMP), etc. Then the corresponding DFM-aware routing problems are formulated and solved using the proposed routing algorithms, respectively. Experimental results show that great yield enhancement can be obtained with a little runtime burden in routing, which proves the feasibility and effectiveness of considering DFM issues during the routing stage