Experimental Framework for Injecting Logic Errors in a Virtual Machine to Profile Applications for Soft Error Resilience
Abstract: As the high performance computing (HPC) community continues to push for ever larger machines, reliability remains a serious obstacle. Further, as feature size and voltages decrease, the rate of transient soft errors is on the rise. HPC programmers of today have to deal with these faults to a small degree and it is expected this will only be a larger problem as systems continue to scale.
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