Simultaneous Wire Sizing and Decoupling Capacitance Budgeting for Robust On-Chip Power Delivery

Jingjing Fu, Zuying Luo, Xianlong Hong, Yici Cai, Sheldon X.-D. Tan, Zhu Pan

Abstract: In this paper, we present an efficient method to simultaneously size wire widths and decoupling capacitance (decaps) areas for optimizing power/ ground (P/G) networks modeled as RLC linear networks subject to reliability constraints. We formulate the problem as a nonlinear optimization problem and propose an efficient gradient-based non-linear programming method for searching the solution. We apply a time-domain merged adjoint network to efficiently compute the gradients and a novel equivalent circuit modeling technique to speed up the optimization process. The resulting algorithm is very efficient and experimental results show that the new algorithm is capable of optimizing P/G networks modeled as RLC networks with million nodes within 10 hours in modern workstations.

External IDs:dblp:conf/patmos/FuLHCTP04