LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-MemoryDownload PDFOpen Website

2017 (modified: 30 Mar 2022)IEEE Comput. Archit. Lett. 2017Readers: Everyone
Abstract: Processing-in-memory (PIM) architectures cannot use traditional approaches to cache coherence due to the high off-chip traffic consumed by coherence messages. We propose LazyPIM, a new hardware cache coherence mechanism designed specifically for PIM. LazyPIM uses a combination of speculative cache coherence and compressed coherence signatures to greatly reduce the overhead of keeping PIM coherent with the processor. We find that LazyPIM improves average performance across a range of PIM applications by 49.1 percent over the best prior approach, coming within 5.5 percent of an ideal PIM mechanism.
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