A General Performance Model for Multistage Interconnection Networks

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Christos Bouras, John D. Garofalakis, Paul G. Spirakis, Vassilis Triantafillou

Published: 1997, Last Modified: 09 May 2025Euro-Par 1997EveryoneRevisionsBibTeXCC BY-SA 4.0
Abstract: In this paper we analyze the general case of Multistage Interconnection Networks (MINs), made of k × k switches with finite, infinite or zero length buffers (unbuffered). The exact solution of the steady state distribution of the first stage is derived for all cases. We use this to get an approximation for the steady state distributions in the second stage and beyond. In the case of unbuffered switches we reach the known exact solution for all the stages of the MIN. Our results are validated by extensive simulations.