Irregular Sparsity-Enabled Search-in-Memory Engine for Accelerating Spiking Neural Networks

Fangxin Liu, Zongwu Wang, Ning Yang, Haomin Li, Tao Yang, Haibing Guan, Li Jiang

Published: 2025, Last Modified: 18 Mar 2026APPT 2025EveryoneRevisionsBibTeXCC BY-SA 4.0
Abstract: Spiking neural networks (SNNs) have gained significant attention due to their efficiency in processing event-driven information. The core computations in SNNs, such as matrix bit-wise AND and ADD operations, align naturally with process-in-memory (PIM) architectures. However, the extended input spike trains in SNNs and the bit-serial processing mechanism of PIM introduce notable latency and frequent analog-to-digital conversions, undermining performance and energy efficiency. To this end, we propose a novel Search-in-Memory (SIM) architecture, called SIMSnn, designed to accelerate SNN inference. Unlike traditional bit-by-bit processing over multiple time steps, SIMSnn processes a sequence of spikes in parallel through associative matches in a CAM crossbar. Additionally, SIMSnn leverages non-structured pruning, which is typically incompatible with most PIM architectures, to reduce CAM overhead. As a weight-agnostic SNN accelerator, SIMSnn adapts seamlessly to evolving SNN models without requiring crossbar array rewrites. Experiments show that SIMSnn achieves a \(25.3\times \) higher energy efficiency and a \(13.7\times \) speedup on average compared to the ISAAC-like design. When compared to the state-of-the-art PIM design, NEBULA, SIMSnn can also realize up to a \(7.9\times \) energy savings and a \(5.7\times \) speedup.
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