Abstract: Logic encryption is a popular technique to safeguard an IC design from different security vulnerabilities. However, several recently proposed attacks exploit the weakness in key-gate placement schemes to extract the secret keys of an encrypted design. Security of a logic encryption strategy highly depends on the locations of the key-gates in a circuit. Most of the state-of-the-art logic encryption schemes suffer from the fact that the defence strategies against different attacks demand different locations for the placement of the key-gates. Therefore, it becomes incredibly challenging for a single solution to thwart all the state-of-the-art attacks. In this paper, we address this issue and propose a strategy which judiciously selects the locations of the key-gates to prevent different attacks and simultaneously satisfies another fundamental criterion of logic encryption, i.e., high output corruption for wrong keys.
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