Leveraging LLMs to Improve Hardware-Software Co-Design Workflow Productivity and Accessibility

Kavya Sreedhar, Josh Ogbonda, Pengqi Yin, Narges Shahidi, Kanthi Nagaraj, Zhijie Deng, Rami Cohen, Ton Kalker, Sameer Kumar, Amir Yazdanbakhsh, Suvinay Subramanian

Presentation: In-Person

Keywords: hardware-software co-design, workflow automation, LLMs, prompt engineering, design productivity

Presenter Full Name: Kavya Sreedhar

Presenter Email: [e-mail]

Abstract: Hardware-software co-design workflows are critical for chip design. However, these workflows are often manual and require expert knowledge. In this paper, we propose leveraging LLMs to improve the productivity and the accessibility of these workflows. With customized prompt engineering, we can enable LLMs to generate architecture insights from various large data sources describing the performance of models on different hardware systems. We create a taxonomy for the stages of questions that users ask during a typical co-design workflow. This taxonomy provides a way to logically reason about performance data and evaluate the capabilities of LLM-integrated workflows. We then introduce our prototype system, VIEW, which relies on custom prompting with Gemini 2.0 Flash. VIEW is currently able to replace humans in the loop for some types of questions, improving productivity, and explain its reasoning when arriving at conclusions, improving accessibility. To illustrate the importance of our prompt engineering, we evaluate Gemini 2.0 Flash out of the box, without any prompting, in this workflow. Unlike VIEW, Gemini 2.0 Flash by itself hallucinates answers when data is not available. We hope this preliminary proof of concept encourages the community to further pursue this direction of research.

Presenter Bio: Kavya Sreedhar is a Research Scientist at Google, working on hardware/software co-design for TPUs. She defended her PhD in Electrical Engineering at Stanford, advised by Mark Horowitz, in 2024, and received her MS in Electrical Engineering from Stanford in 2020. She previously graduated from Caltech with a BS in Electrical Engineering and a BS in Business, Economics, and Management in 2019.

Paper Checklist Guidelines: I certify that all co-authors have validated the presented results and conclusions, and have read and commit to adhering to the Paper Checklist Guidelines, Call for Papers and Publication Ethics.

YouTube Link: N/A

YouTube Link Poster: https://youtu.be/gu05VoZb45c

Google Slides: N/A

Poster: Yes

Workshop Registration: Yes, the presenter has registered for the workshop.

YouTube Link Short: Will update by deadline.

Submission Number: 4