CDS Circuit with High-Performance VGA Functionality and Its Design Procedure

Haoyu Zhuang, Zhangming Zhu, Jingyu Wang, Yintang Yang

Abstract: In order to process charge-coupled-device (CCD) signals, a correlated double sampling (CDS) circuit is necessary for noise elimination. Furthermore, in order to amplify the CCD signals to proper amplitude, an extra variable-gain amplifier (VGA) circuit is also necessary for providing gain. In traditional works, for conciseness and efficiency, those separated CDS and VGA circuits are combined together into a single circuit. However, such a CDS circuit with embedded VGA can provide only several different gain values and 12-bit sampling resolution at most, which cannot meet the increasing demands from the users. Hence, for this reason, a new CDS circuit with embedded VGA has been proposed in this paper. This new CDS circuit has five advantages: high resolution of VGA-gain programming (512 different gain values), wide span of VGA-gain range (0–18 dB), good linearity of VGA-gain curve (linear-in-dB), fast sampling rate (80 MHz), and high sampling resolution (14-bit). Furthermore, this new CDS circuit can automatically convert “single-ended input signal” into “dual-ended output signal,” facilitating subsequent signal processing. Finally, this proposed circuit is fabricated in SMIC 0.18 $$\upmu \hbox {m}$$ μ m 3.3 V CMOS process. Under 80 MHz sampling rate, the measurement results show that the SNR is 72.96 dB; the SFDR is 80 dB; and the ENOB is 11.54-bit.