Self-Aware On-Chip Systems

Jörg Henkel

Abstract: fig orientation="portrait" position="float" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <graphic orientation="portrait" position="float" xlink:href="henke-2763125.tif"/> </fig> As on-chip system grow more complex, are increasingly heterogeneous, and design constraints are multifarious (low chip footprint, high performance, low power density, high reliability, security, and so on), it is virtually impossible to design fixed on-chip polices a priori. The term “self-awareness” implies that flexible run-time decisions should be taken with respect to the state of an on-chip system. Though we are only at the beginning of self-aware on-chip systems, I want to recall that the basic ideas and some of the principles date back to the early 2000s or even before. A major initiate was IBM’s Autonomic Computing initiative from around 2001 as well as some other international research programs around the same time on the very topic. What is new at this point, however, is that 1) now there is a real need for on-chip system to move towards this paradigm due to the aforementioned reasons and 2) the resources needed to achieve self-awareness are now available on-chip without taking too many resources away from the applications. In that sense, I am very grateful to our Guest Editors Axel Jantsch and Nikil Dutt for bringing us this exciting topic. Beside the five papers in this special issue, we will have a follow up since the special issue call attracted an unexpected high number of submissions. The authors also provide us a survey on the topic: “Self-Awareness in Systems on Chip—A Survey.”