Caches and Hash Trees for Efficient Memory Integrity Verification

Published: 2003, Last Modified: 15 May 2025HPCA 2003EveryoneRevisionsBibTeXCC BY-SA 4.0
Abstract: We study the hardware cost of implementing hash-tree based verification of untrusted external memory by a high performance processor. This verification could enable applications such as certified program execution. A number of schemes are presented with different levels of integration between the on-processor L2 cache and the hash-tree machinery. Simulations show that for the best of our methods, the performance overhead is less than 25%, a significant decrease from the 10/spl times/ overhead of a naive implementation.
Loading