CMOS Mixed-Signal Spiking Neural Network Circuit Using a Time-Domain Digital-To-Analog Converter

Seiji Uenohara, Kazuyuki Aihara

Abstract: This paper proposes a high energy efficiency CMOS mixed-signal spiking neural network circuit using a time-domain digital-to-analog converter (TDAC) for realizing online and on-chip brainmorphic learning hardware. The circuit consists of a mixed-signal synapse circuit and an analog leaky integrate-and-fire neuron circuit. The TDAC converts synaptic weights held by digital memory into an analog current that realizes a biologically plausible synaptic response, which is employed as an output stage for our synapse circuit. To evaluate online and on-chip learning operation, the remote supervised method (ReSuMe) was implemented using TSMC 40-nm (1-poly, 8-metal) CMOS technology, and this circuit was evaluated by a Spectre circuit simulator. The circuit simulation results show that energy per synaptic event in our circuit was 20.1 fJ for multiply-accumulation operation and 92.1 fJ for ReSuMe.