Minimum Implant Area-Aware Threshold Voltage Refinement in Pre-Placement

Eunsol Jeong, Heechun Park, Jooyeon Jeong, Taewhan Kim

Abstract: Using multiple threshold voltages (Multi-Vt) is widely adopted due to its effectiveness to optimize the balance between power and timing. In the meantime, as the technology node shrinks, the minimum implant area (MIA) constraint has become an emerging challenge in multi- Vt circuit designs. In this paper, we propose an MIA-aware Vt refinement algorithm to be performed in a way to reduce the number of occurrences of MIA violations. Our key idea is to update the Vt of small size cells that are likely to incur MIA violations in advance before cell placement, thereby relieving the burden of fixing MIA violations during the placement stage that performs the operations of moving/swapping cells or trading circuit timing with Vt change. Through experiments with benchmark circuits, it is shown that our proposed method is able to reduce the number of MIA violations by up to 16% with no timing penalty.