Brief Industry Paper: AXI-Interconnect: Towards a Real-Time AXI-Interconnect for System-on-Chips

Zhe Jiang, Neil C. Audsley, Dayu Shill, Kecheng Yang, Nathan Fisher, Zheng Dong

Abstract: In modern, real-time heterogeneous systems, ensuring the predictability of interconnects is becoming increasingly important. Existing interconnects are mainly designed to achieve high throughput, with their micro-architectures usually based on FIFO queues. This FIFO-based design prevents prioritization of transactions based on their importance, leading to difficulties in ensuring transaction predictability, especially in a system with a large number of system components. In this paper, we introduce AXI-InterconnectRT, a real-time AXI interconnect for heterogeneous SoCs, which redefines the micro-architecture of interconnects by enabling random accesses of buffered transactions and organizing transactions using dedicated hardware units. With the new micro-architecture, AXI-InterconnectRT can manage transactions based on their importance, guaranteeing their predictability.