Circuit HMM: A Deterministic Hidden Markov Model for Automated Sequential Circuit Design

18 Sept 2025 (modified: 11 Feb 2026)Submitted to ICLR 2026EveryoneRevisionsBibTeXCC BY 4.0
Keywords: Sequential circuit, Automated Circuit Design, Hidden Markov Model
Abstract: Designing logic circuits requires significant time for manual programming, which hinders the rapid iteration of product development. To alleviate this extensive manual effort, researchers have investigated machine learning methods for automatically programming the hardware description language (HDL) code, and have achieved success in designing combinational circuits. However, due to the complexity of internal state transitions, the design accuracy for sequential circuits remains insufficient for practical applications, whereas the design accuracy of combinational circuits can achieve 99.99999999999%. This paper proposes a novel machine learning model, Circuit HMM, a deterministic Hidden Markov Model (HMM), for accurately designing sequential circuits. Our key insight is that the input-output relationship of the sequential circuits can be formalized as a Markov Process, significantly reducing the design space. With this computationally efficient model, we prove that the design accuracy of the sequential circuit converges to 100% with linear complexity. Circuit HMM (1) first learns the hidden states by constructing an effective finite state machine (FSM) by heuristic **state mining**, which ensures the error rate caused by the inaccurate states converges to zero; (2) accurately transforms the sequential circuit design problem into a series of combinational circuit design problems by efficient **state encoding**; and (3) then learns the combinational circuit implementation from the input-output relations with a state-of-the-art logic regression tool, i.e. the BSD Learner, which ensures the combinational error rate converges to zero. Experimental results demonstrate that the proposed method can accurately design real-world circuit modules comprising up to 5,000 logic gates, significantly outperforming the state-of-the-art. In 41 out of 43 cases, the design accuracy converges to 100% within 5 minutes.
Primary Area: infrastructure, software libraries, hardware, systems, etc.
Submission Number: 11493
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