XNOR-SRAM: In-Bitcell Computing SRAM Macro based on Resistive Computing MechanismOpen Website

2019 (modified: 18 Nov 2022)ACM Great Lakes Symposium on VLSI 2019Readers: Everyone
Abstract: We present an in-memory computing SRAM macro for binary neural networks. The memory macro computes XNOR-and-accumulate for binary/ternary deep convolutional neural networks on the bitline without row-by-row data access. It achieves 33X better energy and 300X better energy-delay-product than digital ASIC and achieves high accuracy in machine learning tasks (98.3% for MNIST and 85.7% for CIFAR-10 datasets).
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