Efficient Built-In Self-Test Strategy for Neuromorphic Hardware Based On Alarm Placement

Ilknur Mustafazade, Anup Das, Nagarajan Kandasamy

Abstract: Neuromorphic hardware that mimics the neural structure of the brain can efficiently run spiking neural networks (SNNs) to perform various machine learning tasks. Built-in self-test capability (BIST) is critical to ensure the reliability and functionality of these systems when deployed in mission-critical applications such as autonomous vehicles. We introduce an online BIST strategy for neuromorphic hardware that aims to maximize fault coverage while reducing the testing time needed to detect and isolate faulty components. Our key contribution is the adaptation of the alarm placement problem for this purpose. The topology of a typical SNN allows for multiple fault propagation paths through the network, and we take advantage of this property to test (or place alarms on) only the minimum number of neurons necessary to isolate any faulty neuron in the SNN. The alarms themselves detect erroneous behavior by measuring the dissimilarity between the observed and expected spike trains generated by a neuron based on the applied test pattern. The efficacy of the BIST approach is evaluated using multiple SNN models in single- and multiple-fault scenarios. We also evaluate different spike dissimilarity metrics in terms of their fault-detection effectiveness.