NeuroTorch: DRAM-free nonvolatile memory-based hybrid training compute-in-memory system simulator

JongHyun Ko, Inseok Lee, Kyu-Ho Lee, Joon Hwang, Min-Kyu Park, Jiseong Im, Jeonghyun Kim, Ryun-Han Koo, Sung-Ho Park, Jae-Joon Kim, Jong-Ho Lee

Abstract: We present NeuroTorch, a simulator for nonvolatile memory-based compute-in-memory. It integrates the parallel outer product update and hybrid training, eliminating the need for weight gradient computation units and DRAM. Conventional on-chip training using weight gradient computation units and DRAM does not fully leverage the analog capabilities of for nonvolatile memory-based compute-in-memory during weight gradient computation and weight update phases. NeuroTorch assumes minimized usage of additional hardware modules for feed-forward, backpropagation, weight gradient computation, and weight update phases, offering insights into new, energy-efficient compute-in-memory. NeuroTorch shows that the new compute-in-memory approach improves energy efficiency by over 20 times compared to that of conventional on-chip training. (Code: https://github.com/SMDLGITHUB/NeuroTorch)