A High-Speed Dynamic Partial Reconfiguration Controller Using Direct Memory Access Through a Multiport Memory Controller and Overclocking with Active Feedback

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John Colby Hoffman, Marios S. Pattichis

Published: 01 Jan 2011, Last Modified: 14 Nov 2024Int. J. Reconfigurable Comput. 2011EveryoneRevisionsBibTeXCC BY-SA 4.0