A Novel CMOS Circuit for Depressing Synapse and its Application to Contrast-Invariant Pattern Classification and Synchrony Detection

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Yusuke Kanazawa, Tetsuya Asai, Masayuki Ikebe, Yoshihito Amemiya

Published: 01 Jan 2004, Last Modified: 26 May 2025Int. J. Robotics Autom. 2004EveryoneRevisionsBibTeXCC BY-SA 4.0
Abstract: A compact complementary metal-oxide semiconductor (CMOS) circuit for depressing synapses is designed for demonstrating applications of spiking neural networks for contrast-invariant pattern classification and synchrony detection.