An effective fault localization approach for Verilog based on enhanced contexts

Published: 01 Jan 2024, Last Modified: 17 Nov 2024Frontiers Comput. Sci. 2024EveryoneRevisionsBibTeXCC BY-SA 4.0
Abstract: The HDL research community recognizes the pivotal role of bug localization in the debugging workflow, offering substantial relief to developers. This paper introduces ContextHD, a robust bug localization method tailored for Verilog, leveraging enhanced contexts. ContextHD integrates static slicing techniques with advanced suspiciousness measurement methods to generate a prioritized list of statements based on their suspicious values, arranged in descending order. Our experimental evaluation involved comparing ContextHD with seven established state-of-the-art bug localization techniques. The results unequivocally demonstrate that ContextHD outperforms these methods significantly. Future endeavors include refining ContextHD to further enhance its accuracy.
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