PATH: Evaluation of Boolean Logic Using Path-Based In-Memory Computing Systems

Sven Thijssen, Muhammad Rashedul Haq Rashed, Sumit Kumar Jha, Rickard Ewetz

Abstract: In-memory computing using nonvolatile memory is a promising pathway to accelerate data-intensive applications. While substantial research efforts have been dedicated to executing Boolean logic using digital in-memory computing, the limitation of state-of-the-art paradigms is that they heavily rely on repeatedly switching the state of the nonvolatile resistive devices using expensive WRITE operations. In this article, we propose a new in-memory computing paradigm called path-based computing (PATH) for evaluating Boolean logic. Computation within the paradigm is performed using a one-time expensive compilation phase and a fast and efficient evaluation phase. The key property of the paradigm is that the execution phase only involves cheap READ operations. First, we define an analogy between binary decision diagrams (BDDs) and one-transistor one-memristor (1T1M) crossbars that allows Boolean functions to be mapped into crossbar designs. When such crossbar design becomes too large to be physically realizable, we propose to synthesize the Boolean function into a PATH system. A PATH system consists of a topology of staircase structures. A staircase structure is a cascade of hardwired crossbars, which minimizes intercrossbar communication. We evaluate the proposed paradigm using ten circuits from the Revlib benchmark suite, eight control circuits of the EPFL benchmark suite, and eight ISCAS85 benchmarks. Compared with state-of-the-art digital in-memory computing paradigms, PATH improves energy and latency with $1006 \times $ and $10 \times $ on average, respectively.