High-g Capacitive Accelerometer Arrays with Low Bias Instability

Gary K. Fedder, Vincent P. J. Chung, Metin G. Guney, Xiaoliang Li, Yi-Chung Lin, Suresh Santhanam, Jeyanandh Paramesh, Tamal Mukherjee

Abstract: Accelerometer metrics of performance include higher dynamic range, lower noise, lower bias instability and lower power. As with all systems, these trade-offs compete. Achieving large dynamic range in accelerometers drives design trade-offs of sensitivity and survivability at the high end and low noise and drift at the low end of the range. CMOS-MEMS technology enables deployment of system-on-chip designs comprising an array of hundreds of individual accelerometer cells integrated with low-noise readout circuits and on-chip temperature, stress, and scale-factor sensors to compensate drift. These systems range to 50 kg shock measurement with 3 mg bias instability and a path toward micro-g bias instability.