Fault Bounding On-Die BCH Codes for Improving Reliability of System ECC

Seongyoon Kang, Chaehyeon Shin, Jongsun Park

Abstract: While continuous dynamic random access memory (DRAM) scaling may require an on-die error correction code (ECC) with enhanced correction capability, a double error correcting code with fault bounding scheme has not been explored. In this brief, we present the fault bounding on-die Bose-Chaudhuri–Hocquenghem (BCH) code that improves the compatibility with one-symbol error correcting system ECC used in dual data rate five (DDR5) dual in-line memory module (DIMM). By modifying the H matrix of BCH code, the proposed decoding method determines the fault boundary within which burst errors occur, effectively preventing the spread of these errors across fault boundaries. A comparison of bounded rates with conventional codes illustrates the enhanced compatibility with system ECC. The encoder and decoder of the proposed code have been implemented using a 28-nm CMOS process to demonstrate the hardware cost.