A parallel compensated Horner scheme for SIMD architecture

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Stef Graillat, Youness Ibrahimy, Clothilde Jeangoudoux, Christoph Quirin Lauter

Published: 2023, Last Modified: 02 Mar 2026ARITH 2023EveryoneRevisionsBibTeXCC BY-SA 4.0
Abstract: A parallel algorithm for accurate polynomial evaluation is proposed for SIMD architectures. This is a parallelized version of the compensated Horner scheme using error-free transformations. The proposed parallel algorithm in this paper is fast and is designed to achieve a result as if computed in twice the working precision and then rounded to the working precision. Numerical results are presented showing the performance of this new parallel algorithm.