Si-Backside Side-Channel Leakage Measurement and Simulation

Rikuu Hasegawa, Kazuki Monta, Takuya Wadatsumi, Takuji Miki, Makoto Nagata, Lang Lin, Akhilesh Kumar, Norman Chang

Abstract: Integrated circuit (IC) chips equipped with crypto circuits are susceptible to side-channel (SC) attacks that exploit SC information derived from the operation of the crypto circuit to reveal the secret keys. In this paper, we focus on the Si substrate voltage on the backside of the IC chip. The use of flip-chip implementations has led to the emergence of a new threat: direct probing attacks on the Si substrate. In this paper, we present a novel Si-backside voltage simulation method that extends the Chip Power Model (CPM). Furthermore, we analyze the Si-backside voltage and evaluate the SC leakage.