Partial-Sum Quantization Based on Pseudo-Quantization Noise for Variation-Tolerant Analog In-Memory Computing

Nameun Kang, Eunhyeok Park, Sangsu Park, Jongil Kim, Jaeyun Yi, Jae-Joon Kim

Published: 2025, Last Modified: 17 Mar 2026ISLPED 2025EveryoneRevisionsBibTeXCC BY-SA 4.0
Abstract: Analog Computing-In-Memory (ACiM) accelerators with multi-level cells (MLCs) offer high density and area benefits for DNNs. To enhance efficiency, ADC resolution needs to be minimized, but this introduces significant quantization errors, lowering accuracy. Additionally, device noise and ADC integral nonlinearity (INL) noise further degrade accuracy. To address these challenges, we propose a training method that reduces ADC resolution while compensating for noise generated in ACiM arrays. By incorporating pseudo-quantization noise into Partial-Sum Training (PST), our approach not only stabilizes PST but also trains the model to become robust to ACiM-specific noise effects. Experimental results based on an industry ReRAM technology show that our PST scheme demonstrates robust noise tolerance across various ACiM configurations and maintains accuracy degradation within 1% even in the presence of cell conductance variability and ADC INL noise, while enabling low-resolution ADCs that reduces area and energy consumption by up to 16× and 31×, respectively.
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