Distributed Genetic Algorithm on Cluster of Intel Xeon Phi Co-processors

Published: 01 Jan 2018, Last Modified: 11 Nov 2024FDSE 2018EveryoneRevisionsBibTeXCC BY-SA 4.0
Abstract: This paper presents a study to parallelize genetic algorithm on cluster of Intel Xeon Phi co-processors. Our study investigates using hybrid MPI and OpenMP to parallelize genetic algorithm (GA) onto high performance computing (HPC) servers included Intel Xeon Phi co-processors. We will revise sequential GA and parallelize the GA into parallel GA, which a highly portable, modern code and optimized in any MIC architectures like Knights Corner (KNC), Knights Landing (KNL), or even the up-coming processors of Intel like Knights Hill by using Intel compiler, MPI and several OpenMP directives. Our implementation is experimented on built-in 50-TFlops Supernode-XP, which is cluster of HPC servers (each server has two Intel Xeon Phi cards). Our simulated result shows that the proposed distributed GA onto cluster of Intel Xeon Phi co-processors (MICs) reduces significant execution time in comparison with sequential GA.
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