Efficient Multi-Objective Optimization for PVT Variation-Aware Circuit Sizing Using Surrogate Models and Smart Corner Sampling
Abstract: Circuit sizing for designs with many design variables and responses is a complex task that requires highly experienced and creative designers to invest precious time in trial and error, routine work. In addition, sizing the circuit while also taking into account PVT (process, voltage, temperature) variation corners increases the complexity further. To simplify such tasks, designers select the most unfavorable PVT corner in advance (leveraging their expertise), perform circuit sizing for this condition, and finally verify the resulting design in all PVT corners. This procedure might generate designs that fail the specifications in other PVT corners leading to more design-verification iterative loops. Recent years brought machine learning (ML) and optimization techniques to the field of circuit design, with evolutionary algorithms and Bayesian models showing good results for automated circuit sizing. However, these methods can still require an unfeasibly large number of simulations, especially if taking into account several PVT corners. In this context, we introduce a methodology that uses surrogate ML models to perform PVT variation-aware circuit sizing. We propose to dynamically select the worst PVT corners and take them into account when sizing the circuit. In addition, we explore the best ways to model process corners with Gaussian Processes, leading to more than 10x improvements for such surrogate models. We evaluate the proposed corner management method on two voltage regulators showing different levels of complexity and highlight that it enables finding feasible solutions 2x faster when compared to baseline algorithms which optimize in all PVT corners. In addition, the quality and diversity of the proposed solutions are significantly higher by one to three orders of magnitude in terms of population hypervolume.
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