Higher Linearity and Low Noise DC Amplifier With Current Mirror Linear Compensation Structure in Digital Multimeter

Shilong Wang, Hengbo Wang, Shoupeng Deng, Jianrong Wei, Tuo Li, Hanlin Gao, Jialin Zhang, Fei Liu, Dianbang Dang, Yanzhang Wang

Abstract: The high-linearity and low noise amplifier has been developed as a core module to improve the testing accuracy and weak signal capture ability of the high-precision digital multimeter. This article focuses on optimizing the linearity and noise of the dc amplifier by using the nonlinearity of the current mirror to compensate for junction field-effect transistor (JFET) mismatch. This effectively suppresses the second-order nonlinearity caused by JFET mismatch and results in a high-linearity parameter model. The device noise of the dc amplifier is carefully selected and optimized under this high-linearity model. The experiment shows that under linear fitting, the nonlinear errors of the dc amplifier are 15, 9, and 4 ppm for input voltages of 0.1, 1, and 10 V, respectively. This is a significant improvement compared to the nonlinear errors before optimizing the current mirror structure, which were reduced by 100 times. The linear fitting error of the dc amplifier is now less than that of the Keysight 37740A. The white noise of the dc amplifier is also improved, with a value of less than 6 nV/Hz ${}^{1/2}$ , and the peak-to-peak noise is now 282 nV, which is equivalent to the noise performance of the Keysight 37740A. Under third-order polynomial fitting, the nonlinear errors of the dc amplifier are 5, 4.8, and 0.5 ppm for input voltages of 0.1, 1, and 10 V, respectively. This is comparable to the linearity performance of the Fluke 8508A. The peak-to-peak noise of the amplifier after average processing is also equivalent to the noise performance of the Fluke 8508A.

External IDs:dblp:journals/tim/WangWDWLGZLDW25