Electromagnetic security tests for SoC

Fabien Majéric, Eric Bourbao, Lilian Bossuet

Abstract: This experimental study addresses the problem of assessing the digital security of System on Chip (SoC) against electromagnetic (EM) hardware attacks through their packages. With large and complex circuits such as SoC, finding the right location and the right time to examine attacks such as side channel analysis and fault injection is a real challenge. In addition, setting up properly the parameters of these attacks is time consuming. Through an application on a commercial SoC, this article presents an approach which from a side channel analysis results, performs a fault injection attack. This approach shows firstly, the potential time saved to determine the injection time parameter of the fault attack and secondly, it enables to analyze the duality between the emission fields and the areas where errors occur. Thus, a security test of the SoC against EM field is presented in this study.