A0.81 mm2 740μW Real-Time Speech Enhancement Processor Using Multiplier-Less PE Arrays for Hearing Aids in 28nm CMOS

Sungjin Park, Sunwoo Lee, Jeongwoo Park, Hyeong-Seok Choi, Dongsuk Jeon

Abstract: Speech enhancement (SE) is a task to improve voice quality and intelligibility by removing noise from the audio, which is widely adopted in hearing assistive devices. Hearing aids are generally worn in or behind the ear, requiring real-time processing with a limited power budget. Deep learning-based algorithms provide excellent SE quality, but their large model size and high computational complexity make them unsuitable for wearable hearing assistive devices. Recent hardware-oriented works mitigate these issues through algorithm and hardware optimization [1–3]. Nonetheless, they exhibit inferior SE performance relative to state-of-the-art models or rely on large neural network models, limiting overall processing efficiency. This paper presents an end-to-end SE system that delivers high-quality SE with low power consumption and small area, while meeting real-time processing constraints. Our main contributions are: 1) an importance-aware neural network optimization method that significantly reduces computational costs, while maintaining enhancement quality, 2) a reconfigurable processing element (PE) for efficiently processing both the coordinate rotation digital computer (CORDIC) algorithm and neural network layers, and 3) PE input routing and weight mapping schemes to minimize processing latency by enhancing PE utilization. Based on these design techniques, our processor fabricated in a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$28\mathsf{nm}$</tex> CMOS process fulfills real-time speech enhancement by processing each frame within <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$8\mathsf{ms}$</tex> while consuming only <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$740\mu \mathsf{W}$</tex> . Also, the design achieves the highest objective evaluation score compared to previous SE processors.