A novel VLSI architecture for multidimensional discrete wavelet transform

Xinjian Chen, Qionghai Dai

Abstract: In this short paper we propose a novel VLSI architecture for multidimensional discrete wavelet transform (m-D DWT) based on systolic array and non-separable approach. The proposed architecture performs a decomposition of an N/sub 1/ /spl times/ N/sub 2/ /spl times/ ... /spl times/ N/sub m/ image in about N/sub 1/ N/sub 2/...N/sub m//(2/sup m/ $1) clock cycles (ccs). This result considerably speeds up other known architectures. Besides, the advantages of the proposed architecture include very simple hardware complexity, regular data flow and low control complexity.