Real-time HDTV to 4K and 8K-UHD conversions using anti-aliasing based super resolution algorithm on FPGA

Prasoon Ambalathankandy, Shinya Takamaeda, Masato Motomura, Tetsuya Asai, Masayuki Ikebe, Hotaka Kusano

Abstract: The demand for light-weight and high-speed super resolution (SR) techniques are growing because of super high-resolution displays, such as 4K/8K ultra high definition televisions (UHDTVs), which have become common. We propose a single pass over up-sampled anti-aliasing based SR method. Our method can attenuate jaggies and perform natural-looking contrast improvement focusing only on the shadow part in the edge of an enlarged image without the need to preserve the entire enlarged image. Therefore, this method is suitable for hardware implementation, and the proposed architecture requires five-line buffers only (in the memory section). We implemented the proposed method on a field programmable gate array (FPGA) and demonstrated HDTV-to-4K and-8K SR processing in real time (60 frames per second).