TDDB Reliability in Gate-All-Around Nanosheet

Huimei Zhou, Miaomiao Wang, Ruqiang Bao, Tian Shen, Ernest Y. Wu, Richard G. Southwick, Jingyun Zhang, Veeraraghavan S. Basker, Dechao Guo

Abstract: Time dependent dielectric breakdown (TDDB) reliability is studied on interfacial layer (IL)/high-K gate stack of Gate-All-Around Nanosheet (GAA-NS) N- and P-type Field Effect Transistors (FETs) with volume-less multiple threshold voltage (multi-Vt) integration scheme enabled by the dual dipoles (n-dipole and p-dipole). We report for the first time Key TDDB Modeling parameters: voltage acceleration exponent (VAE), Weibull slope ( β), and activation energy (E <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">a</sub> ) and show robust TDDB reliability in multi-Vt NS transistors enabled by different dipoles.