A memory access model for highly-threaded many-core architectures

Published: 01 Jan 2014, Last Modified: 20 May 2025Future Gener. Comput. Syst. 2014EveryoneRevisionsBibTeXCC BY-SA 4.0
Abstract: Highlights•We design a memory model to analyze algorithms for highly-threaded many-core systems.•The model captures significant factors of performance: work, span, and memory accesses.•We show the model is better than PRAM by applying both to 4 shortest paths algorithms.•Empirical performance is effectively predicted by our model in many circumstances.•It is the first formalized asymptotic model helpful for algorithm design on many-cores.
Loading