Multiphase digitally controlled oscillator for future 5G phased arrays in 90 nm CMOS

Arnout Devos, Marco Vigilante, Patrick Reynaert

Abstract: This paper reports a low noise Digitally Controlled Oscillator (DCO) with multiphase outputs, suitable for next generation phased arrays. The DCO core is implemented using an 8 stage Rotary Traveling Wave Oscillator (RTWO) topology. Simple design equations are presented and insight is given in the layout implementation. Designed in a 90 nm CMOS process, the prototype is tunable from 31.4 to 37 GHz (i.e. 16% tuning range). Drawing 45 mW from a 1.2V supply, the simulated phase noise is −127.3 dBc/Hz at 10 MHz offset from a 34 GHz carrier, resulting in a phase-noise FoM of −181.4 dBc/Hz. Digitally tuned slow wave transmission lines are used to achieve a fine tuning resolution of 1.8 MHz, resulting in a state-of-the-art tuning FoMDT of −187 dBc/Hz.

External IDs:dblp:conf/norchip/DevosVR16