Bio-plausible Learning-on-Chip with Selector-less Memristive Crossbars

Published: 2024, Last Modified: 15 May 2025ISCAS 2024EveryoneRevisionsBibTeXCC BY-SA 4.0
Abstract: One of the practical realizations of large-scale neuromorphic systems requires an area-efficient memristive crossbar array as a key building block supporting high-density synaptic connectivity. Conventional memristor-based AI accelerators rely on selector transistors to reduce sneak path-induced cross-talks, although other means can be equally effective. Removing the selector element on each memristor cross-point significantly improves array density (down to 4F 2) and lowers power consumption. We present an integrated reconfigurable neuromorphic platform interfacing a selector-less 16x16 RRAM memristor crossbar array with peripheral row and column instrumentation for robust learning and inference with applications to AI on the edge. Bio-plausible local Hebbian-like incremental outer-product learning rules are mapped onto direct implementation across the memristive crossbar array, updated in a sequence of partial outer-product combinations presented at the periphery of the array. Our system provides a user-configurable platform to accommodate a broad spectrum of emerging non-volatile memory device technologies for synaptic crossbar arrays with embedded adaptive functionality for general AI and cognitive neuromorphic computing.
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