A 20-ch TDC/ADC Hybrid Architecture LiDAR SoC for 240 × 96 Pixel 200-m Range Imaging With Smart Accumulation Technique and Residue Quantizing SAR ADC

Published: 01 Jan 2018, Last Modified: 05 Mar 2025IEEE J. Solid State Circuits 2018EveryoneRevisionsBibTeXCC BY-SA 4.0
Abstract: This paper presents a time-to-digital converter/analog-to-digital-converter (TDC/ADC) hybrid LiDAR system-on-chip (SoC) to realize reliable self-driving systems. The smart accumulation technique (SAT) is proposed to achieve both 200-m and high-pixel-resolution range imaging, which was untrodden with conventional LiDARs. The “smart” accumulation is realized by a simple object recognition strategy with small circuit overhead. When compared to conventional accumulations, the LiDAR range is enhanced without degrading the pixel resolution. Moreover, a TDC/ADC hybrid architecture is proposed to achieve a wide-distance-range LiDAR with a small silicon area and short-range precision. To minimize the ADC cost, a residue-quantizing noise-shaping (RQNS) SAR ADC is proposed. The prototype LiDAR SoC is fabricated in the 28-nm CMOS technology and integrated into the silicon photomultiplier (SiPM)-based LiDAR system. LiDAR measured with 240 × 96 pixels at 10 frames/s achieves a measurement range of 200 m with a 70-klx direct sunlight: the measurement range is 2× longer than conventional designs. Furthermore, our LiDAR achieves 4× higher effective pixel resolution compared to conventional designs using simple accumulation. A 3-D point-cloud image acquired with a real-life environment is presented.
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