Exchange-Coupling-Enabled Electrical-Isolation of Compute and Programming Paths in Valley-Spin Hall Effect based Spintronic Device for Neuromorphic Applications

Karam Cho, Xuanyao Fong, Sumeet Kumar Gupta

Abstract: As one of endeavors to efficiently process emerging data-intensive workloads (e.g. in deep neural networks (DNNs)), compute-in-memory (CiM) has been considered as a promising computing paradigm. It performs computation ( e.g . dot products between inputs and stored weights) within a memory array, which reduces the power-hungry data transmission between the processor and memory [1]. As the technological enablers for CiM, spintronic devices have been explored extensively [1] – [3]. Amongst different candidates, Valley Spin Hall Effect (VSHE) based devices based on monolayer WSe2 (VSHE-MRAM [1]) has been shown to possess key advantages such as compatibility with perpendicular magnetic anisotropy (PMA) magnets (leading to low power write/programming), large valley hall angle (for high programming efficiency) and partially independent optimization of read-write paths. However, low mobility of monolayer WSe2 (Fig. 1(a)) gives rise to a large series resistance (RS) in the read (compute) path, which deteriorates the sense margin. This can be especially critical for CiM of dot products, which needs to sense a wider range of currents compared to standard memories. To tackle this issue, we utilize an experimental study in [4] which shows that two PMA magnets can be coupled through exchange-coupling mediated by FeCo-oxide and Ta layers. We combine exchange-coupling between PMA magnets with VSHE to design and analyze a spintronic device with Electrically-Isolated Compute-Programming paths (EICP device), which mitigates the adverse effect of the large series resistance (RS) in the previously-proposed VSHE-MRAM (baseline device). We also evaluate the circuit implications of the device in the context of CiM.