PVTSizing: A TuRBO-RL-Based Batch-Sampling Optimization Framework for PVT-Robust Analog Circuit Synthesis

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Zichen Kong, Xiyuan Tang, Wei Shi, Yiheng Du, Yibo Lin, Yuan Wang

Published: 01 Jan 2024, Last Modified: 15 May 2025DAC 2024EveryoneRevisionsBibTeXCC BY-SA 4.0