A Cost-efficient 1.28 Tb/s DWDM Receiver using All-Si Double Microring Avalanche Photodiodes

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Yiwei Peng, Yuan Yuan, Wayne V. Sorin, Stanley Cheung, Zhihong Huang, Di Liang, Marco Fiorentino, Raymond G. Beausoleil

Published: 01 Jan 2024, Last Modified: 20 May 2025OFC 2024EveryoneRevisionsBibTeXCC BY-SA 4.0
Abstract: We demonstrate a novel 8-channel all-Si double-MRR RX with record-high 1.28 Tb/s aggregated data rate and ultra-low -50 dB crosstalk, which can compete with the commercial RXs and promises ~ 40% chip cost saving.