Optimizing ML Classification Models for Constrained EDA Resource Budgets

Ganapathy Parthasarathy, Bhuvnesh Kumar, Saurav Nanda, Parivesh Choudhary, Sridhar Rajakumar

Abstract: Methods based on machine learning (ML) are gaining increasing importance at various stages of the integrated circuit (IC) design flow including EDA applications. However, real-world EDA flows are constrained by dynamic changes in resource availability such as compute, license costs, and time-to-results in the IC-design life cycle. In addition, typical industrial ML models must deal with highly imbalanced datasets that pose challenges in maximizing model quality of results (QoR). This paper addresses the problem of optimizing ML model QoR in a resource-constrained environment. Our approach partitions the binary classification problem into that of first generating a high-quality calibrated discrete probability distribution over data and then poses the classification step as an optimization problem where the generated probabilities are used as dynamic weights in the constraint set. We propose a method to find close-to-optimal solutions to balance QOR with prediction latency and resource constraints. The proposed method is generic in that it applies to any binary classification problem that generates sets of predictions in the described environment of highly imbalanced data combined with user-defined QOR, prediction latency, and resource constraints. We present experimental results using our approach on an industrial ML model for verification regression test selection and compare it with default predictions to demonstrate the method’s effectiveness.