PLMC: A Predictable Tail Latency Mode Coordinator for Shared NVMe SSD with Multiple Hosts

Tanaya Roy, Jit Gupta, Krishna Kant, Amitangshu Pal, Dave Minturn, Arash Tavakkol

Abstract: Solid-State Drives (SSDs) involve a complex set of management activities in the background, resulting in unpredictable delays and occasional extended access latencies. However, there is an increasing demand for "deterministic" access latency in a growing number of scenarios. This demand has prompted a new feature in the NVMe storage access protocol called Predictable Latency Mode (PLM), which provides a way to tighten tail latency in SSDs. This paper presents the first study of the PLM feature in a single-host environment and its extension to multi-host settings. We propose a PLM Coordinator (PLMC) that regulates access to the PLM of a shared SSD device based on the hosts’ traffic characteristics. Our simulation experiments show that the proposed PLMC can achieve 82% improvement in 99.99% tail latency compared to a bare SSD without PLM feature. Moreover, the proposed coordinator with simple traffic prediction can perform 93.2% better than without coordinator on the 99%-tail latency values.