Design of HEVC Intra Model Decision Based on Zynq

Zhengdong Cui, Jun Xia, Yu Wang, Guangyi Shi, Wei Yan

Abstract: In this paper, we propose a fast frame based on Block RAM reuse. The experimental results show that the maximum support clock frequency is 200MHz, and the encoding speed is 29.7FPS@1080P. Compared with the reference source mode selection process running in ARM platform, the proposed design is 118.8 times faster. Compared to HDL way, based on HLS design complex algorithm has the advantages of high development efficiency, short development cycle and good portability.