Hardware-based text-to-braille translator

Published: 01 Jan 2006, Last Modified: 28 Sept 2024ASSETS 2006EveryoneRevisionsBibTeXCC BY-SA 4.0
Abstract: This paper describes the hardware implementation of a text to Braille Translator using Field-Programmable Gate Arrays (FPGAs). Different from most commercial software-based translators, the circuit presented is able to carry out text-to-Braille translation in hardware. The translator is based on the translating algorithm, proposed by Paul Blenkhorn [1]. The Very high speed Hardware Description Language (VHDL) was used to describe the chip in a hierarchical way. The test results indicate that the hardware-based translator achieves the same results as software-based commercial translators.
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